ISP1761ET NXP Semiconductors, ISP1761ET Datasheet - Page 13

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ISP1761ET

Manufacturer Part Number
ISP1761ET
Description
USB Interface IC USB 2.0 HS OTG HOST
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1761ET

Operating Supply Voltage
1.65 V to 3.6 V
Lead Free Status / Rohs Status
 Details
Other names
ISP1761ET,557

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NXP Semiconductors
Table 2.
[1]
[2]
[3]
[4]
[5]
[6]
ISP1761_4
Product data sheet
Symbol
RESET_N
GNDA
C_B
C_A
V
OC1_N/V
OC2_N
CC(C_IN)
Symbol names ending with underscore N, for example, NAME_N, represent active LOW signals.
All ground pins should normally be connected to a common ground plane.
I = input only; O = output only; I/O = digital input/output; OD = open-drain output; AI/O = analog input/output; AI = analog input; P =
power; (AI/O)(I) = analog input/output digital input; AI/I = analog input digital input.
For port 1.
For port 2.
For port 3.
[1][2]
BUS
Pin description
Pin
LQFP128
122
123
124
125
126
127
128
…continued
Ball
TFBGA128
B6
B5
A5
B4
A4
B3
A3
Type
I
-
AI/O
AI/O
P
(AI/O)(I)
AI/I
[3]
Rev. 04 — 5 March 2007
Description
external power-up reset; active LOW; when reset is asserted, it is
expected that bus signals are idle, that is, not toggling
input, 3.3 V tolerant
Remark: During reset, ensure that all the input pins to the ISP1761
are not toggling and are in their inactive states.
analog ground
charge pump capacitor input; connect a 220 nF capacitor between
this pin and pin 125
charge pump capacitor input; connect a 220 nF capacitor between
this pin and pin 124
charge pump input; connect to 3.3 V
This pin has multiple functions:
5 V tolerant
port 2 analog (5 V input) and digital overcurrent input; if not used,
connect to V
input, 5 V tolerant
Input: Port 1 OC1_N detection when port 1 is configured for
host functionality and an external power switch is used; if not
used, connect to V
resistor is usually required by the open-drain output of the
power-switch flag pin
Output: V
is configured for the OTG functionality; maximum 50 mA
current capability; the overcurrent protection in this case is
ensured by the internal charge pump current limitation; only for
port 1
Input: V
peripheral functionality
BUS
CC(I/O)
BUS
input detection when port 1 is defined for the
out when internal charge pump is used and port 1
through a 10 k resistor
CC(I/O)
through a 10 k resistor; the 10 k
Hi-Speed USB OTG controller
© NXP B.V. 2007. All rights reserved.
ISP1761
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