ISP1761ET NXP Semiconductors, ISP1761ET Datasheet - Page 31

• Manufacturer Part Number: ISP1761ET
• Description: USB Interface IC USB 2.0 HS OTG HOST
• Manufacturer: NXP Semiconductors

Specifications of ISP1761ET

• Operating Supply Voltage: 1.65 V to 3.6 V
• Lead Free Status / Rohs Status: Details
• Other names: ISP1761ET,557

NXP Semiconductors
ISP1761_4
Product data sheet
The internal POR pulse will be generated whenever V
than 11 s.
The recommended RESET input pulse length at power-on must be at least 2 ms to ensure
that internal clocks are stable.
The RESET_N pin can be either connected to V
externally controlled by the microcontroller, ASIC, and so on.
availability of the clock with respect to the external POR.
Fig 11. Internal power-on reset timing
Fig 12. Clock with respect to the external power-on reset
(1) PORP = Power-On Reset Pulse.
Stable external clock is available at A.
t0
t1
t
PORP
Rev. 04 — 5 March 2007
EXTERNAL CLOCK
RESET_N
t2
t3
t
PORP
CC(I/O)
A
CC(5V0)
, using the internal POR circuit or
t4
004aaa583
Hi-Speed USB OTG controller
t5
drops below V
Figure 12
004aaa584
© NXP B.V. 2007. All rights reserved.
shows the
ISP1761
V
V
PORP
CC(5V0)
TRIP
TRIP
(1)
for more
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