ISP1761ET NXP Semiconductors, ISP1761ET Datasheet - Page 51

• Manufacturer Part Number: ISP1761ET
• Description: USB Interface IC USB 2.0 HS OTG HOST
• Manufacturer: NXP Semiconductors

Specifications of ISP1761ET

• Operating Supply Voltage: 1.65 V to 3.6 V
• Lead Free Status / Rohs Status: Details
• Other names: ISP1761ET,557

NXP Semiconductors
Table 51.
[1]
ISP1761_4
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
The reserved bits should always be written with the reset value.
Power Down Control register (address 0354h) bit allocation
8.3.11 Power Down Control register
R/W
R/W
R/W
R/W
31
23
15
0
1
0
7
1
reserved
Table 50.
This register is used to turn off power to internal blocks of the ISP1761 to obtain maximum
power savings.
Bit
31 to 16
15 to 0
reserved
[1]
R/W
R/W
R/W
R/W
30
22
14
0
1
0
6
0
DMA Start Address register (address 0344h) bit description
[1]
Symbol
-
START_ADDR
_DMA[15:0]
Table 51
BIASEN
R/W
R/W
R/W
R/W
29
21
13
0
1
0
5
1
Rev. 04 — 5 March 2007
shows the bit allocation of the register.
CLK_OFF_COUNTER[15:8]
Description
reserved
Start Address for DMA: The start address for DMA read or write
cycles.
CLK_OFF_COUNTER[7:0]
VREG_ON
PORT3_
R/W
R/W
R/W
R/W
PD
28
20
12
0
0
1
4
0
OC3_PWR
PORT2_
R/W
R/W
R/W
R/W
PD
27
19
11
0
1
1
3
0
VBATDET_
OC2_PWR
PWR
R/W
R/W
R/W
R/W
26
18
10
0
0
0
2
0
Hi-Speed USB OTG controller
OC1_PWR
R/W
R/W
R/W
R/W
25
17
1
0
9
1
1
0
© NXP B.V. 2007. All rights reserved.
reserved
ISP1761
HC_CLK_
[1]
R/W
R/W
R/W
R/W
EN
51 of 163
24
16
1
0
8
1
0
0