ISP1761ET NXP Semiconductors, ISP1761ET Datasheet - Page 7

• Manufacturer Part Number: ISP1761ET
• Description: USB Interface IC USB 2.0 HS OTG HOST
• Manufacturer: NXP Semiconductors

Specifications of ISP1761ET

• Operating Supply Voltage: 1.65 V to 3.6 V
• Lead Free Status / Rohs Status: Details
• Other names: ISP1761ET,557

NXP Semiconductors
Table 2.
ISP1761_4
Product data sheet
Symbol
OC3_N
REF5V
ID
GNDA
REG1V8
V
V
GND(OSC)
REG3V3
V
XTAL1
XTAL2
CLKIN
GNDD
GND(RREF1)
RREF1
GNDA
DM1
GNDA
DP1
PSW1_N
GND(RREF2)
RREF2
GNDA
DM2
GNDA
DP2
CC(5V0)
CC(5V0)
CC(I/O)
[4]
[5]
[1][2]
Pin description
Pin
LQFP128
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
6.2 Pin description
Ball
TFBGA128
C2
A2
B2
A1
B1
C1
D2
E3
D1
E2
E1
F2
F1
G3
G2
G1
H2
H1
J3
J2
J1
K2
K1
L3
L1
L2
M2
Type
AI/I
AI
I
-
P
P
P
-
P
P
AI
AO
I
-
-
AI
-
AI/O
-
AI/O
OD
-
AI
-
AI/O
-
AI/O
[3]
Rev. 04 — 5 March 2007
Description
port 3 analog (5 V input) and digital overcurrent input; if not used,
connect to V
input, 5 V tolerant
5 V reference input for analog OC detector; connect a 100 nF
decoupling capacitor
ID input to detect the default host or peripheral setting when port 1
is in OTG mode; pull-up to 3.3 V through a 4.7 k resistor
input, 3.3 V tolerant
analog ground
core power output (1.8 V); internal 1.8 V for the digital core; used for
decoupling; connect a 100 nF capacitor; for details on additional
capacitor placement, see
input to internal regulators (3.0 V-to-5.5 V); connect a 100 nF
decoupling capacitor; see
input to internal regulators (3.0 V-to-5.5 V); connect a 100 nF
decoupling capacitor; see
oscillator ground
regulator output (3.3 V); for decoupling only; connect a 100 nF
capacitor and a 4.7 F-to-10 F capacitor; see
digital supply voltage; 1.65 V to 3.6 V; connect a 100 nF decoupling
capacitor; see
12 MHz crystal connection input; connect to ground if an external
clock is used
12 MHz crystal connection output
12 MHz oscillator or clock input; when not in use, connect to V
digital ground
RREF1 ground
reference resistor connection; connect a 12 k
between this pin and the RREF1 ground
analog ground
downstream data minus port 1
analog ground
downstream data plus port 1
power switch port 1, active LOW
output pad, push-pull open-drain, 8 mA output drive, 5 V tolerant
RREF2 ground
reference resistor connection; connect a 12 k
between this pin and the RREF2 ground
analog ground
downstream data minus port 2
analog ground
downstream data plus port 2
CC(I/O)
Section 7.7
through a 10 k resistor
Section 7.7
Section 7.7
Section 7.7
Hi-Speed USB OTG controller
Section 7.7
© NXP B.V. 2007. All rights reserved.
ISP1761
1 % resistor
1 % resistor
7 of 163
CC(I/O)