H5PS1G83EFR-S6C HYNIX SEMICONDUCTOR, H5PS1G83EFR-S6C Datasheet - Page 22

58T1895

H5PS1G83EFR-S6C

Manufacturer Part Number
H5PS1G83EFR-S6C
Description
58T1895
Manufacturer
HYNIX SEMICONDUCTOR
Datasheet

Specifications of H5PS1G83EFR-S6C

Memory Type
SDRAM
Memory Configuration
128M X 8
Access Time
15ns
Memory Case Style
FBGA
No. Of Pins
60
Operating Temperature Range
0°C To +85°C
Memory Size
1 Gbit
Rohs Compliant
Yes

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Rev. 0.4 / Nov 2008
Timing Parameters by Speed Grade
DQ output access time from CK/CK
DQS output access time from CK/CK
CK HIGH pulse width
CK LOW pulse width
CK half period
Clock cycle time, CL=x
DQ and DM input setup time(differential strobe)
DQ and DM input hold time(differential strobe)
DQ and DM input setup time(single ended strobe)
DQ and DM input hold time(single ended strobe)
Control & Address input pulse width for each
input
DQ and DM input pulse width for each input
Data-out high-impedance time from CK/CK
DQS low-impedance time from CK/CK
DQ low-impedance time from CK/CK
DQS-DQ skew for DQS and associated DQ
signals
DQ hold skew factor
DQ/DQS output hold time from DQS
Write command to first DQS latching transition
DQS input HIGH pulse width
DQS input LOW pulse width
DQS falling edge to CK setup time
DQS falling edge hold time from CK
Mode register set command cycle time
Write preamble
Write postamble
Address and control input setup time
Address and control input hold time
Read preamble
Read postamble
Active to active command period for 1KB
page size products (x4, x8)
Active to active command period for 2KB
page size products (x16)
Parameter
tAC
tDQSCK
tCH
tCL
tHP
tCK
tDS(base)
tDH(base)
tDS(base)
tDH(base)
tIPW
tDIPW
tHZ
tLZ
(DQS)
tLZ
(DQ)
tDQSQ
tQHS
tQH
tDQSS
tDQSH
tDQSL
tDSS
tDSH
tMRD
tWPRE
tWPST
tIS
tIH
tRPRE
tRPST
tRRD
tRRD
Symbol
tHP - tQHS
2*tAC min
WL - 0.25
min(tCL,
tAC min
5000
min
tCH)
-600
-500
0.45
0.45
0.35
0.35
0.35
150
275
0.35
350
475
7.5
0.6
0.2
0.2
0.4
0.9
0.4
10
25
25
2
-
-
-
DDR2-400
(DDR2-400 and DDR2-533)
WL + 0.25
tAC max
tAC max
tAC max
max
+600
+500
0.55
0.55
8000
350
450
0.6
1.1
0.6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
tHP - tQHS
WL - 0.25
2*tAC min
min(tCL,
tAC min
min
3750
0.45
0.45
tCH)
0.35
0.35
-500
-450
100
225
0.35
0.35
250
375
-25
-25
7.5
0.6
0.2
0.2
0.4
0.9
0.4
10
2
-
-
-
DDR2-533
WL + 0.25
tAC max
tAC max
tAC max
max
+500
+450
8000
0.55
0.55
300
400
0.6
1.1
0.6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
H5PS1G43EFR
H5PS1G83EFR
H5PS1G63EFR
Unit
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ns
ns
ps
ps
6,7,8,20
6,7,8,21
6,7,8,25
6,7,8,26
5,7,9,23
5,7,9,23
Note
11,12
,28
,28
15
18
18
18
13
12
10
19
19
4
4
22

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