SPD6729QCE Intel, SPD6729QCE Datasheet - Page 101
SPD6729QCE
Manufacturer Part Number
SPD6729QCE
Description
PCI To PC Card (PCMCIA) Controller 208-Pin MQFP
Manufacturer
Intel
Datasheet
1.SPD6729QCE.pdf
(116 pages)
Specifications of SPD6729QCE
Package
208MQFP
Operating Temperature
0 to 70 °C
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13.3.3
Datasheet
PCMCIA Bus Timing Calculations
Calculations for minimum PCMCIA cycle Setup, Command, and Recovery timings are made by
first calculating factors derived from the applicable timer set’s timing registers and then by
applying the factor to an equation relating it to the internal clock period.
The PCMCIA cycle timing factors, in terms of the number of internal clocks, are calculated as
follows:
N
Command, and Recovery Timing registers (see
these registers).
From this, a PCMCIA cycle’s Setup, Command, and Recovery time for the selected timer set are
calculated as follows:
Tcp is two times the period of the PCI bus clock connected to the PD6729 PCI_CLK pin.
If PCI_CLK operates at 33 MHz, then:
The timing diagrams that follow were derived for a PD6729 using the PCI clock at 33 MHz. The
examples are for the default values of the Timing registers for Timer Set 0, as follows:
Thus the minimum times for the default values are as follows:
Setup Timing 0
Command Timing 0
Recovery Timing 0
pres
Timing Register Name
and N
Minimum Setup time = (S
Minimum Command time = (C
Minimum Recovery time = (R
(Timer Set 0)
val
are the specific selected prescalar and multiplier value from the timer set’s Setup,
S = (N
C = (N
R = (N
Minimum Setup time = (S
Minimum Command time = (C
Minimum Recovery time = (R
Tcp = 60 ns
pres
pres
pres
N
N
N
Index
val
val
val
3Ah
3Bh
3Ch
) + 1
) + 1
) + 1
Tcp)
Tcp)
Tcp)
20 ns = {[(1
PCI-to-PC Card (PCMCIA) Controller — PD6729
(Default)
Value
20 ns = {[(1
01h
05h
00h
Tcp)
20 ns = {[(1
“Timing Registers” on page 87
Tcp)
Tcp)
20 ns
1) + 1]
20 ns
20 ns
Resultant
0) + 1]
5) + 1]
N
pres
1
1
1
60 ns}
60 ns}
60 ns}
Resultant N
20 ns = 100 ns
30 ns = 30 ns
for description of
1
5
0
20 ns = 340 ns
val
101
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