XCB56362PV100 Freescale Semiconductor, XCB56362PV100 Datasheet - Page 111

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XCB56362PV100

Manufacturer Part Number
XCB56362PV100
Description
DSP Floating-Point 24-Bit 100MHz 100MIPS 144-Pin LQFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of XCB56362PV100

Package
144LQFP
Numeric And Arithmetic Format
Floating-Point
Maximum Speed
100 MHz
Ram Size
33 KB
Device Million Instructions Per Second
100 MIPS

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5.3
Power dissipation is a key issue in portable DSP applications. Some of the factors which affect current
consumption are described in this section. Most of the current consumed by CMOS devices is alternating
current (ac), which is charging and discharging the capacitances of the pins and internal nodes.
Current consumption is described by the following formula:
where:
The maximum internal current (I
on best-case operation conditions, which is not necessarily a real application case. The typical internal
current (I
For applications that require very low current consumption, do the following:
Freescale Semiconductor
For a Port A address pin loaded with 50 pF capacitance, operating at 3.3 V, and with a 100 MHz clock, toggling
at its maximum possible rate (50 MHz), the current consumption is
Consider all device loads as well as parasitic capacitance due to PCB traces when calculating
capacitance. This is especially critical in systems with higher capacitive loads that could create
higher transient currents in the V
All inputs must be terminated (i.e., not allowed to float) using CMOS levels, except for the pins
with internal pull-up resistors (TRST, TMS, DE, TCK, and TDI).
Take special care to minimize noise levels on the V
If multiple DSP56362 devices are on the same board, check for cross-talk or excessive spikes on
the supplies due to synchronous operation of the devices.
RESET must be asserted when the chip is powered up. A stable EXTAL signal should be supplied
before deassertion of RESET.
At power-up, ensure that the voltage difference between the 5 V tolerant pins and the chip V
never exceeds 3.95 V.
C
V
f
Set the EBD bit when not accessing external memory.
Minimize external memory accesses and use internal memory accesses.
Minimize the number of pins that are switching.
Minimize the capacitive load on the pins.
Connect the unused inputs to pull-up or pull-down resistors.
CCItyp
Power Consumption Considerations
= node/pin capacitance
= voltage swing
= frequency of node/pin toggle
) value reflects the average switching of the internal buses on typical operating conditions.
I
=
CCI
50 10
max) value reflects the typical possible switching of the internal buses
Example 1. Current Consumption
×
DSP56362 Technical Data, Rev. 4
CC
12
and GND circuits.
I
×
=
3.3
C V
×
×
50
×
×
f
CCP
10
6
, GND
=
8.25mA
P
, and GND
Power Consumption Considerations
P1
pins.
CC
5-3

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