XCB56362PV100 Freescale Semiconductor, XCB56362PV100 Datasheet - Page 19

• Manufacturer Part Number: XCB56362PV100
• Description: DSP Floating-Point 24-Bit 100MHz 100MIPS 144-Pin LQFP
• Manufacturer: Freescale Semiconductor

Specifications of XCB56362PV100

• Package: 144LQFP
• Numeric And Arithmetic Format: Floating-Point
• Maximum Speed: 100 MHz
• Ram Size: 33 KB
• Device Million Instructions Per Second: 100 MIPS

Freescale Semiconductor
HOREQ/HORE
HRRQ/HRRQ
Signal Name
HTRQ/HTRQ
HACK/HACK
PB14
PB15
Input, Output, or
Input, Output, or
Disconnected
Disconnected
Output
Output
Output
Type
Input
State during Reset
GPIO Disconnected Host Request—When HDI08 is programmed to interface a
GPIO Disconnected Host Acknowledge—When HDI08 is programmed to interface
Table 2-9 Host Interface (continued)
DSP56362 Technical Data, Rev. 4
single host request host bus and the HI function is selected, this
signal is the host request (HOREQ) output. The polarity of the
host request is programmable, but is configured as active-low
(HOREQ) following reset. The host request may be programmed
as a driven or open-drain output.
Transmit Host Request—When HDI08 is programmed to
interface a double host request host bus and the HI function is
selected, this signal is the transmit host request (HTRQ) output.
The polarity of the host request is programmable, but is
configured as active-low (HTRQ) following reset. The host
request may be programmed as a driven or open-drain output.
Port B 14—When the HDI08 is configured as GPIO, this signal
is individually programmed as input, output, or internally
disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
a single host request host bus and the HI function is selected,
this signal is the host acknowledge (HACK) Schmitt-trigger input.
The polarity of the host acknowledge is programmable, but is
configured as active-low (HACK) after reset.
Receive Host Request—When HDI08 is programmed to
interface a double host request host bus and the HI function is
selected, this signal is the receive host request (HRRQ) output.
The polarity of the host request is programmable, but is
configured as active-low (HRRQ) after reset. The host request
may be programmed as a driven or open-drain output.
Port B 15—When the HDI08 is configured as GPIO, this signal
is individually programmed as input, output, or internally
disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
Signal Description
Host Interface (HDI08)
2-13