XCB56362PV100 Freescale Semiconductor, XCB56362PV100 Datasheet - Page 48

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XCB56362PV100

Manufacturer Part Number
XCB56362PV100
Description
DSP Floating-Point 24-Bit 100MHz 100MIPS 144-Pin LQFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of XCB56362PV100

Package
144LQFP
Numeric And Arithmetic Format
Floating-Point
Maximum Speed
100 MHz
Ram Size
33 KB
Device Million Instructions Per Second
100 MIPS

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External Memory Expansion Port (Port A)
3-22
1
2
3
4
5
6
7
153
154
155
156
No.
131 Page mode cycle time for two consecutive accesses of the
132 CAS assertion to data valid (read)
133 Column address valid to data valid (read)
134 CAS deassertion to data not valid (read hold time)
135 Last CAS assertion to RAS deassertion
136 Previous CAS deassertion to RAS deassertion
137 CAS assertion pulse width
138 Last CAS deassertion to RAS assertion
No.
The number of wait states for Page mode access is specified in the DCR.
The refresh period is specified in the DCR.
The asynchronous delays specified in the expressions are valid for DSP56362.
All the timings are calculated for the worst case. Some of the timings are better for specific cases (e.g., t
read-after-read or write-after-write sequences).
There are not any fast enough DRAMs to fit to two wait states Page mode @ 100MHz. See
BRW[1:0] (DRAM Control Register bits) defines the number of wait states that should be inserted in each DRAM out-of-page
access.
RD deassertion will always occur after CAS deassertion; therefore, the restricted timing is t
same direction
Page mode cycle time for mixed (read and write) accesses.
RD assertion to data valid
RD deassertion to data not valid
WR assertion to data active
WR deassertion to data high impedance
• BRW[1:0] = 00
• BRW[1:0] = 01
• BRW[1:0] = 10
• BRW[1:0] = 11
Table 3-10 DRAM Page Mode Timings, Two Wait States
Table 3-11 DRAM Page Mode Timings, Three Wait States
Characteristics
Characteristics
7
DSP56362 Technical Data, Rev. 4
5
Symbol
Symbol
t
t
t
RHCP
t
t
t
t
CAC
RSH
CRP
t
t
OFF
CAS
t
PC
AA
GA
GZ
2.25 × T
3.75 × T
4.75 × T
6.75 × T
2.5 × T
4.5 × T
1.75 × T
0.75 × T
1, 2, 3, 4
Expression
2 × T
3 × T
2 × T
Expression
100 MHz:
100 MHz:
3.5 x Tc
0.25 × T
4 × T
C
C
C
C
C
C
C
C
C
− 7.0
− 7.0
− 4.0
C
C
C
OFF
− 4.0
− 4.0
1, 2, 3, 4
− 6.0
− 6.0
− 6.0
− 6.0
Figure 3-13
(continued)
− 6.5
− 0.3
C
and not t
Freescale Semiconductor
40.0
35.0
21.0
41.0
16.0
41.5
61.5
Min
0.0
Min
0.0
9.1
100 MHz
PC
GZ.
80 MHz
.
equals 3 × T
Max
13.0
23.0
Max
15.4
3.1
Unit
Unit
C
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
for

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