LFSC3GA15E-5FN900I Lattice, LFSC3GA15E-5FN900I Datasheet - Page 62
LFSC3GA15E-5FN900I
Manufacturer Part Number
LFSC3GA15E-5FN900I
Description
IC FPGA 15.2KLUTS 900FPBGA
Manufacturer
Lattice
Datasheet
1.LFSC3GA15E-5FN256C.pdf
(237 pages)
Specifications of LFSC3GA15E-5FN900I
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
*
Number Of I /o
*
Number Of Gates
*
Voltage - Supply
*
Mounting Type
*
Operating Temperature
*
Package / Case
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFSC3GA15E-5FN900I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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LatticeSC/M Internal Timing Parameters
Lattice Semiconductor
EBR Timing
t
t
t
t
t
t
t
t
t
t
t
Cycle Boosting Timing
t
t
t
1. Complete timing parameters for a user design will be incorporated when running ispLEVER. This is a sampling of the key timing parameters.
CO_EBR
COO_EBR
SUDATA_EBR
HDATA_EBR
SUADDR_EBR
HADDR_EBR
SUWREN_EBR
HWREN_EBR
SUCE_EBR
HCE_EBR
RSTO_EBR
DEL1
DEL2
DEL3
Parameter
CK_Q_DEL
CK_Q_DEL
D_CK_SET
D_CK_HLD
A_CK_SET
A_CK_HLD
CE_CK_SET
CE_CK_HLD
CS_CK_SET
CS_CK_HLD
RESET_Q_DEL
DEL1
DEL2
DEL3
Over Recommended Commercial Operating Conditions at VCC = 1.2V +/- 5%
Symbol
Clock (Read) to output from Address
or Data
Clock (Write) to output from EBR
output Register
Setup Data to EBR Memory (Write
clk)
Hold Data to EBR Memory (Write clk) 0.276
Setup Address to EBR Memory
(Write clk)
Hold Address to EBR Memory (Write
clk)
Setup Write/Read Enable to EBR
Memory (Write/Read clk)
Hold Write/Read Enable to EBR
Memory (write/read clk)
Clock Enable Setup Time to EBR
Output Register (Read clk)
Clock Enable Hold Time to EBR Out-
put Register (Read clk)
Reset To Output Delay Time from
EBR Output Register (asynchronous)
Cycle boosting delay 1 applies to
PIO, PFU, EBR
Cycle boosting delay 2 applies to
PIO, PFU, EBR
Cycle boosting delay 3 applies to
PIO, PFU, EBR
Description
3-18
1
(Continued)
-0.173
-0.165
0.390
0.269
0.225
0.073
0.261
0.023
Min.
—
—
—
—
—
-7
DC and Switching Characteristics
1.900
0.589
0.480
0.922
1.366
Max.
—
—
—
—
—
—
—
—
—
LatticeSC/M Family Data Sheet
-0.192
-0.182
0.444
0.305
0.298
0.226
0.095
0.269
0.039
Min.
—
—
—
—
—
-6
2.116
0.673
0.524
1.005
1.488
Max.
—
—
—
—
—
—
—
—
—
-0.210
-0.200
0.498
0.335
0.327
0.226
0.116
0.276
0.055
Min.
—
—
—
—
—
-5
2.335
0.757
0.570
1.090
1.612
Max.
—
—
—
—
—
—
—
—
—
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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