IDT75K62134S200BBG IDT, Integrated Device Technology Inc, IDT75K62134S200BBG Datasheet

IDT75K62134S200BBG

Manufacturer Part Number

IDT75K62134S200BBG

Description

Manufacturer

IDT, Integrated Device Technology Inc

Datasheet

1.IDT75K62134S200BBG.pdf (1 pages)

Specifications of IDT75K62134S200BBG

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Bonase Electronics (HK) Co., Limited

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IDT75K62134S200BBG

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IDT

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Introduction

performance, feature-rich, easy-to-use, Network Search Engine (NSE)

products. Using CAM (Content Addressable Memory) technology, IDT

NSE products accelerate search functions for Access Control Lists (ACL),

Flow Caching, and forwarding to improve performance in next generation

networking equipment.

◆ ◆ ◆ ◆ ◆

 2002 Integrated Device Technology, Inc.

NSE Features

ZBT and ZeroBus Turnaround are trademarks of Integrated Device Technology, Inc. and the architecture is supported by Micron Technology and Motorola Inc.

QDR™ - Quad Data Rate (Trademark of Cypress, IDT, Micron, NEC and Samsung.)

respective owners.

128K x 72 (9M) or 64K x 72 (4.5M) Data and Mask cells

Full Ternary Content Addressable Memory

Advanced Database Management

- Selectable Databases

- Programmable Width per Database

- Lookup widths from 32 to 576 bits

- Only the selected Database is powered

Lookup Instructions

- Standard Lookup

- Multi-Hit Lookup

- Multi-Database Lookup

- Re-Issue Multi-Database Lookup

- Aging

- Multi Hit Invalidate

- Learn per Database

35mm x 35mm BGA Package

As part of the IDT IP Co-Processor product family, IDT delivers high

Maintenance Features

2.5V I/O Supply for ZBT® Associated Data SRAM

Pool of (72-bit) Global Mask Registers (shared across contexts)

Multi-Context support

1.5V HSTL I/O Supply

In-Band Control and Management

1.2V Core Supply

interface

Lowest Power per Application

Synchronous Pipeline Operation

Boundary Scan JTAG Interface

Assoicated Data SRAM is supported through a glue-less ZBT®

To request the full datasheet, please contact your local

IDT Sales Representative or call 1-800-345-7015

4.5M and 9M Network

Search Engine (NSE)

with LA-1 Interface

Product specifications subject to change without notice.

Device Description

having a LA-1 look aside interface. Multiple devices including the LA-1

NSE can be connected to the same LA-1 interface. Each LA-1 NSE device

may be point-to-point expanded up to eight NSE devices.

External Interfaces

The following external interfaces are supported by the LA-1 NSE device

◆ ◆ ◆ ◆ ◆

Figure 1.0 LA-1 NSE External Interfaces

Associated Data SRAM with standard ZBT® Interface

Single LA-1 NPU interface

- LA-1 Clock Frequency up to 250 MHz

- Supports LA-1 burst of 2

- Echo clocks supported (CQ, CQ)

Point-to-Point Cascading Interface

- Up to eight NSEs can be cascaded using this scheme

Boundary Scan JTAG Interface (IEEE 1149.1)

All brands or products are the trademarks or registered trademarks of their

The NSE with a single LA-1 interface is intended to work with any NPU

Control

Read

Logic

Write

Logic

QDR

Addressable Memory

Ternary Content

JTAG Interface

256K x 36 Full

JANUARY 2003

IDT75K52134

IDT75K62134

6070 drw04aa

Cascade

Interface

ZBT

Product

DSC-6070/00

Brief

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