SLXT973QC Cortina Systems Inc, SLXT973QC Datasheet - Page 53
SLXT973QC
Manufacturer Part Number
SLXT973QC
Description
Manufacturer
Cortina Systems Inc
Datasheet
1.SLXT973QC.pdf
(97 pages)
Specifications of SLXT973QC
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SLXT973QCA3V
Manufacturer:
INTEL
Quantity:
1 094
LXT973 Transceiver
Datasheet
249426, Revision 6.0
13 July 2007
5.0
Table 13
Cortina Systems
Configuration
When the LXT973 Transceiver is first powered on, reset, or encounters a link-down state,
it must determine the line speed and operating conditions to use for the network link. The
LXT973 Transceiver first checks the MDIO registers (initialized via the Hardware Control
interface or written by software) for operating instructions. Using these mechanisms, the
user can command the LXT973 Transceiver to do one of the following:
In forced twisted-pair link operation, the LXT973 Transceiver immediately begins
operating the network interface as commanded. In the last case, the LXT973 Transceiver
begins the auto-negotiation/parallel-detection process.
Several pins are used to configure the LXT973 Transceiver device.
the available manual configurations to the port. Usually these pins are decodes of chip
pins. This is useful for manual configuration.
Configuration Settings (Hardware Control Interface) (Sheet 1 of 2)
®
1. These pins also set the default values for Registers 0 and 4 accordingly.
FIBER_TPn
• Forced 100BASE-FX operation
• Forced twisted-pair link operation to:
• Allow auto-negotiation/parallel-detection.
LXT973 10/100 Mbps Dual-Port Fast Ethernet PHY Transceiver
— 100BASE-TX, full-duplex
— 100BASE-TX, half-duplex
— 10BASE-T, full-duplex
— 10BASE-T, half-duplex
High
High
High
High
High
Low
Low
AUTO_NEGx
High
High
High
High
Low
–
–
SPEEDx
High
High
High
Low
Low
–
–
DUPLEXx
High
High
High
High
Low
Low
Low
100BASE-FX is enabled in half-duplex mode.
Auto-negotiation is disabled
100BASE-FX is enabled in full-duplex mode.
Auto-negotiation is disabled.
AUTO_NEG is enabled. All capabilities are
advertised.
Register bits 4.8, 4.7, 4.6 and 4.5 are all set to 1.
AUTO_NEG is enabled. Only 100 Mbps
capabilities are advertised.
Register bits 4.8 and 4.7are set to 1. Register bits
4.6 and 4.5 are cleared to 0.
AUTO_NEG is enabled. Only 10 Mbps
capabilities are advertised.
Register bits 4.8 and 4.7 are cleared to 0. Register
bits 4.6 and 4.5 are set to 1.
AUTO_NEG is enabled. Only half-duplex
capabilities are advertised.
Register bits 4.7 and 4.5 are set 1. Register bits
4.8 and 4.6 are cleared to 0.
AUTO_NEG is disabled. LXT973 Transceiver port
x is forced to 100 Mbps full-duplex operation.
Mode
Table 13
5.0 Configuration
summarizes
Page 53