SLXT973QC Cortina Systems Inc, SLXT973QC Datasheet - Page 8

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SLXT973QC

Manufacturer Part Number
SLXT973QC
Description
Manufacturer
Cortina Systems Inc
Datasheet

Specifications of SLXT973QC

Lead Free Status / Rohs Status
Not Compliant

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LXT973 Transceiver
Datasheet
249426, Revision 6.0
13 July 2007
Figures
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Cortina Systems
Block Diagram ...............................................................................................................................12
Pin Assignments ............................................................................................................................13
Interfaces.......................................................................................................................................24
Loopback Paths ............................................................................................................................27
Management Interface Read Frame Structure ..............................................................................28
Management Interface Write Frame Structure ..............................................................................28
Port Address Scheme ...................................................................................................................29
Auto-Negotiation Operation ..........................................................................................................34
100BASE-X Frame Format ...........................................................................................................36
Protocol Sublayers .......................................................................................................................38
Typical LED Implementation .........................................................................................................41
Power and Ground Supply Connections ......................................................................................46
Typical Twisted-Pair Interface ......................................................................................................47
Recommended LXT973 Transceiver Transceiver-to-3.3 V Fiber Transceiver Interface Circuitry .48
Recommended LXT973 Transceiver-to-5 V Fiber Transceiver Interface Circuitry ........................49
ON Semiconductor* Triple PECL-to-LVPECL Logic Translator ....................................................50
Typical MII Interface .....................................................................................................................50
Initialization Sequence...................................................................................................................52
100BASE-TX Frame Format .........................................................................................................57
100BASE-TX Data Path ................................................................................................................57
100BASE-TX Reception with no Errors .........................................................................................58
100BASE-TX Reception with Invalid Symbol ................................................................................59
100BASE-TX Transmission with no Errors....................................................................................59
100BASE-TX Transmission with Collision .....................................................................................59
MII 10BASE-T DTE Mode Auto-Negotiation..................................................................................63
100BASE-T DTE Mode Auto-Negotiation......................................................................................63
Link Down Clock Transition ...........................................................................................................64
PHY Identifier Bit Mapping ............................................................................................................68
100BASE-TX Transmit Timing - 4B Mode .....................................................................................81
100BASE-TX Receive Timing - 4B Mode ......................................................................................82
100BASE-FX Transmit Timing ......................................................................................................83
100BASE-FX Receive Timing ......................................................................................................84
10BASE-T Transmit Timing (Parallel Mode) .................................................................................85
10BASE-T Receive Timing (Parallel Mode) ..................................................................................86
10BASE-T SQE (Heartbeat) Timing ..............................................................................................87
10BASE-T Jab and Unjab Timing..................................................................................................87
Fast Link Pulse Timing ..................................................................................................................88
FLP Burst Timing...........................................................................................................................88
MDIO Input Timing ........................................................................................................................89
MDIO Output Timing......................................................................................................................89
Power-Up Timing...........................................................................................................................90
RESET Pulse Width and Recovery Timing ...................................................................................91
Mechanical Specifications .............................................................................................................92
Example of Top Marking Information Labeled as Cortina Systems, Inc. .......................................93
Sample PQFP Package (marked as Intel*) – LXT973QC Transceiver .........................................93
Sample Pb-Free (RoHS-Compliant) PQFP Package (marked as Intel*) –
Ordering Information – Sample .....................................................................................................96
Intel
*
EGLX973QC Transceiver ..................................................................................................94
®
LXT973 10/100 Mbps Dual-Port Fast Ethernet PHY Transceiver
Figures
Page 8

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