TDA8932BTW/N2,118 NXP Semiconductors, TDA8932BTW/N2,118 Datasheet - Page 12

• Manufacturer Part Number: TDA8932BTW/N2,118
• Description: IC AMP AUDIO CLASS D 32HTSSOP
• Manufacturer: NXP Semiconductors
• Type: Class Dr

Specifications of TDA8932BTW/N2,118

• Output Type: 1-Channel (Mono) or 2-Channel (Stereo)
• Package / Case: 32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
• Max Output Power X Channels @ Load: 55W x 1 @ 8 Ohm; 26.5W x 2 @ 4 Ohm
• Voltage - Supply: 10 V ~ 36 V, ±5 V ~ 18 V
• Features: Depop, Differential Inputs, Mute, Short-Circuit and Thermal Protection
• Mounting Type: Surface Mount
• Product: Class-D
• Output Power: 55 W
• Available Set Gain: 36 dB
• Common Mode Rejection Ratio (min): 75 dB
• Thd Plus Noise: 0.007 %
• Operating Supply Voltage: 22 V
• Supply Current: 0.145 mA
• Maximum Power Dissipation: 5000 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Audio Load Resistance: 8 Ohms
• Dual Supply Voltage: +/- 11 V
• Input Signal Type: Differential
• Minimum Operating Temperature: - 40 C
• Output Signal Type: Differential, Single
• Supply Type: Single or Dual
• Supply Voltage (max): 36 V
• Supply Voltage (min): 10 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935283479118

NXP Semiconductors
Table 4.
[1]
UJA1079_2
Product data sheet
Bit
15:13 A2, A1, A0
12
11
10:8
7
6
5
4
3
2:0
Bit NWP is set to it’s default value (100) after a reset.
Symbol
RO
WMC
NWP
WOS/SWR
V1S
reserved
WLS1
WLS2
reserved
WD_and_Status register
[1]
6.2.3 WD_and_Status register
Access Power-on
R
R/W
R/W
R/W
R/W
R
R
R
R
R
default
000
0
0
100
-
-
1
-
-
000
All information provided in this document is subject to legal disclaimers.
Description
register address
access status
watchdog mode control
nominal watchdog period
watchdog off status/software reset
V1 status
wake-up 1 status
wake-up 2 status
0: register set to read/write
1: register set to read only
0: Normal mode: watchdog in Window mode; Standby mode: watchdog in
Timeout mode
1: Normal mode: watchdog in Timeout mode; Standby mode: watchdog in
Off mode
000: 8 ms
001: 16 ms
010: 32 ms
011: 64 ms
100: 128 ms
101: 256 ms
110: 1024 ms
111: 4096 ms
0: WDOFF pin LOW; watchdog mode determined by bit WMC
1: watchdog disabled due to HIGH level on pin WDOFF; results in software
reset
0: V1 output voltage above 90 % undervoltage recovery threshold
(V
1: V1 output voltage below 90 % undervoltage detection threshold
(V
0: WAKE1 input voltage below switching threshold (V
1: WAKE1 input voltage above switching threshold (V
0: WAKE2 input voltage below switching threshold (V
1: WAKE2 input voltage above switching threshold (V
uvr
uvd
; see
; see
Rev. 02 — 27 May 2010
Table
Table
10)
10)
LIN core system basis chip
th(sw)
th(sw)
th(sw)
th(sw)
UJA1079
© NXP B.V. 2010. All rights reserved.
)
)
)
)
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