TDA8932BTW/N2,118 NXP Semiconductors, TDA8932BTW/N2,118 Datasheet - Page 33

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TDA8932BTW/N2,118

Manufacturer Part Number
TDA8932BTW/N2,118
Description
IC AMP AUDIO CLASS D 32HTSSOP
Manufacturer
NXP Semiconductors
Type
Class Dr
Datasheets

Specifications of TDA8932BTW/N2,118

Output Type
1-Channel (Mono) or 2-Channel (Stereo)
Package / Case
32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
Max Output Power X Channels @ Load
55W x 1 @ 8 Ohm; 26.5W x 2 @ 4 Ohm
Voltage - Supply
10 V ~ 36 V, ±5 V ~ 18 V
Features
Depop, Differential Inputs, Mute, Short-Circuit and Thermal Protection
Mounting Type
Surface Mount
Product
Class-D
Output Power
55 W
Available Set Gain
36 dB
Common Mode Rejection Ratio (min)
75 dB
Thd Plus Noise
0.007 %
Operating Supply Voltage
22 V
Supply Current
0.145 mA
Maximum Power Dissipation
5000 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Audio Load Resistance
8 Ohms
Dual Supply Voltage
+/- 11 V
Input Signal Type
Differential
Minimum Operating Temperature
- 40 C
Output Signal Type
Differential, Single
Supply Type
Single or Dual
Supply Voltage (max)
36 V
Supply Voltage (min)
10 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935283479118
NXP Semiconductors
Table 10.
T
positive currents flow in the IC; typical values are given at V
UJA1079_2
Product data sheet
Symbol
R
LIN receive data output; pin RXDL
I
I
R
LIN bus line; pin LIN
I
I
I
I
I
V
V
V
V
C
V
LIN bus termination; pin DLIN
ΔV
Temperature protection
T
T
OH
OL
BUS_LIM
BUS_PAS_rec
BUS_PAS_dom
L(log)
L(lob)
vj
th(act)otp
th(rel)otp
rec(RX)
dom(RX)
th(cntr)RX
th(hys)RX
O(dom)
pu
pu
ext
=
(DLIN-BAT)
40 °C to +150
Static characteristics
Parameter
pull-up resistance
HIGH-level output current
LOW-level output current
pull-up resistance
current limitation for driver
dominant state
receiver recessive input
leakage current
receiver dominant input
leakage current including
pull-up resistor
loss of ground leakage
current
loss of battery leakage
current
receiver recessive voltage
receiver dominant voltage
receiver center threshold
voltage
receiver hysteresis threshold
voltage
external capacitance
dominant output voltage
voltage difference between
pin DLIN and pin BAT
overtemperature protection
activation threshold
temperature
overtemperature protection
release threshold
temperature
°
C; V
BAT
= 4.5 V to 28 V; V
…continued
All information provided in this document is subject to legal disclaimers.
Conditions
LIN Active mode; V
V
MC = 00; Standby mode
LIN Active mode; V
V
V
V
V
V
V
V
V
V
V
V
on pin LIN
LIN Active mode; V
V
LIN Active mode; V
V
5 mA < I
BAT
RXDL
TXDL
LIN
TXDL
BAT
BAT
BAT
BAT
th(cntr)RX
BAT
th(hys)RX
BAT
BAT
BAT
> V
Rev. 02 — 27 May 2010
= 28 V; V
= V
= 0 V; V
= 5.5 V to 18 V
= 5.5 V to 18 V
= 5.5 V to 18 V; LIN Active mode
= 5.5 V to 18 V; LIN Active mode
= 7 V
= 18 V
= 0.4 V
= 0 V
= V
V1
DLIN
GND
= V
= (V
; R
V1
; V
BAT
LIN
< 20 mA
= 28 V; V
th(rec)RX
LIN
BAT
th(rec)RX
LIN
= 500
= 14 V; unless otherwise specified.
= 28 V
= 5.5 V; V
= 0 V; V
RXDL
BAT
TXDL
TXDL
− V
+ V
Ω
LIN
= V
; all voltages are defined with respect to ground;
th(dom)RX
= 0 V
= 0 V
= V
th(dom)RX
= 0 V
BAT
LIN
TXDL
V1
= 18 V
= 14 V
− 0.4 V
= V
)/2
V1
Min
4
−20
1.6
4
40
-
−10
−100
-
V
0.475
× V
0.05 ×
V
-
-
-
0.4
165
126
0.6 ×
-
LIN core system basis chip
BAT
BAT
BAT
Typ
12
-
-
12
-
-
-
-
-
-
-
0.5 ×
V
0.15 ×
V
-
-
-
0.65
180
138
BAT
BAT
UJA1079
© NXP B.V. 2010. All rights reserved.
25
25
30
Max
−1.5
20
100
2
+10
10
2
-
0.4V
0.525 ×
V
0.175 ×
V
1.4
2.0
1
200
150
BAT
BAT
BAT
33 of 45
pF
Unit
mA
mA
mA
μA
μA
μA
μA
V
V
V
V
V
V
V
°C
°C

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