TDA8932BTW/N2,118 NXP Semiconductors, TDA8932BTW/N2,118 Datasheet - Page 45

• Manufacturer Part Number: TDA8932BTW/N2,118
• Description: IC AMP AUDIO CLASS D 32HTSSOP
• Manufacturer: NXP Semiconductors
• Type: Class Dr

Specifications of TDA8932BTW/N2,118

• Output Type: 1-Channel (Mono) or 2-Channel (Stereo)
• Package / Case: 32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
• Max Output Power X Channels @ Load: 55W x 1 @ 8 Ohm; 26.5W x 2 @ 4 Ohm
• Voltage - Supply: 10 V ~ 36 V, ±5 V ~ 18 V
• Features: Depop, Differential Inputs, Mute, Short-Circuit and Thermal Protection
• Mounting Type: Surface Mount
• Product: Class-D
• Output Power: 55 W
• Available Set Gain: 36 dB
• Common Mode Rejection Ratio (min): 75 dB
• Thd Plus Noise: 0.007 %
• Operating Supply Voltage: 22 V
• Supply Current: 0.145 mA
• Maximum Power Dissipation: 5000 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Audio Load Resistance: 8 Ohms
• Dual Supply Voltage: +/- 11 V
• Input Signal Type: Differential
• Minimum Operating Temperature: - 40 C
• Output Signal Type: Differential, Single
• Supply Type: Single or Dual
• Supply Voltage (max): 36 V
• Supply Voltage (min): 10 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935283479118

NXP Semiconductors
17. Contents
1
2
2.1
2.2
2.3
2.4
2.5
3
4
5
5.1
5.2
6
6.1
6.1.1
6.1.2
6.1.3
6.1.4
6.1.5
6.1.6
6.2
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
6.2.6
6.3
6.4
6.4.1
6.4.2
6.4.3
6.5
6.5.1
6.5.2
6.5.3
6.6
6.6.1
6.6.2
6.7
6.7.1
6.7.1.1
6.7.1.2
6.7.2
6.7.2.1
6.7.2.2
6.8
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pinning information . . . . . . . . . . . . . . . . . . . . . . 5
Functional description . . . . . . . . . . . . . . . . . . . 6
Control and Diagnostic features . . . . . . . . . . . . 2
Watchdog Timeout behavior . . . . . . . . . . . . . . 17
TXDL dominant time-out function . . . . . . . . . . 22
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
LIN transceiver . . . . . . . . . . . . . . . . . . . . . . . . . 2
Power management . . . . . . . . . . . . . . . . . . . . . 2
Voltage regulator V1 . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
System Controller . . . . . . . . . . . . . . . . . . . . . . . 6
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Off mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Standby mode. . . . . . . . . . . . . . . . . . . . . . . . . . 9
Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Overtemp mode . . . . . . . . . . . . . . . . . . . . . . . 10
SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Register map . . . . . . . . . . . . . . . . . . . . . . . . . 11
WD_and_Status register. . . . . . . . . . . . . . . . . 12
Mode_Control register . . . . . . . . . . . . . . . . . . 13
Int_Control register . . . . . . . . . . . . . . . . . . . . . 14
Int_Status register. . . . . . . . . . . . . . . . . . . . . . 15
On-chip oscillator . . . . . . . . . . . . . . . . . . . . . . 16
Watchdog (UJA1079/xx/WD versions) . . . . . . 16
Watchdog Window behavior . . . . . . . . . . . . . . 16
Watchdog Off behavior . . . . . . . . . . . . . . . . . . 17
System reset. . . . . . . . . . . . . . . . . . . . . . . . . . 17
RSTN pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
EN output . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
LIMP output . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Power supplies . . . . . . . . . . . . . . . . . . . . . . . . 19
Battery pin (BAT) . . . . . . . . . . . . . . . . . . . . . . 19
Voltage regulator V1 . . . . . . . . . . . . . . . . . . . . 19
LIN transceiver . . . . . . . . . . . . . . . . . . . . . . . . 21
LIN operating modes . . . . . . . . . . . . . . . . . . . 21
Active mode . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Lowpower/Off modes . . . . . . . . . . . . . . . . . . . 22
Fail-safe features . . . . . . . . . . . . . . . . . . . . . . 22
General fail-safe features . . . . . . . . . . . . . . . . 22
Local wake-up input . . . . . . . . . . . . . . . . . . . . 22
6.9
6.10
7
8
9
10
11
11.1
12
13
13.1
13.2
13.3
13.4
14
15
15.1
15.2
15.3
15.4
16
17
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [e-mail]
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 25
Thermal characteristics . . . . . . . . . . . . . . . . . 27
Static characteristics . . . . . . . . . . . . . . . . . . . 29
Dynamic characteristics. . . . . . . . . . . . . . . . . 34
Test information . . . . . . . . . . . . . . . . . . . . . . . 37
Package outline. . . . . . . . . . . . . . . . . . . . . . . . 38
Soldering of SMD packages . . . . . . . . . . . . . . 39
Revision history . . . . . . . . . . . . . . . . . . . . . . . 42
Legal information . . . . . . . . . . . . . . . . . . . . . . 43
Contact information . . . . . . . . . . . . . . . . . . . . 44
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Interrupt output. . . . . . . . . . . . . . . . . . . . . . . . 24
Temperature protection . . . . . . . . . . . . . . . . . 24
Quality information . . . . . . . . . . . . . . . . . . . . . 37
Introduction to soldering. . . . . . . . . . . . . . . . . 39
Wave and reflow soldering. . . . . . . . . . . . . . . 39
Wave soldering . . . . . . . . . . . . . . . . . . . . . . . 39
Reflow soldering . . . . . . . . . . . . . . . . . . . . . . 40
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 43
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 44
LIN core system basis chip
Document identifier: UJA1079_2
UJA1079
Date of release: 27 May 2010
All rights reserved.