MC68HC908JK8MP Motorola, MC68HC908JK8MP Datasheet

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MC68HC908JK8MP

Manufacturer Part Number
MC68HC908JK8MP
Description
Manufacturer
Motorola
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908JK8MP
Manufacturer:
MAXIM
Quantity:
6 248
Part Number:
MC68HC908JK8MP
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Addendum
HC908JL8AD/D
Rev. 0, 5/2002
Addendum to
MC68HC908JL8
Technical Data
MC68HC08JL8
MC68HC08JK8
Memory ($DC00–$FBFF)
User vectors ($FFDC–$FFFF)
Registers at $FE08 and $FFCF
Mask option register ($FFD0)
Monitor ROM
($FC00–$FDFF and $FE10–$FFCE)
Available Packages
Table 1. Summary of MC68HC08JL8 and MC68HC908JL8 Differences
This addendum provides update and additional information to the
The MC68HC08JL8 is the ROM part equivalent to the MC68HC908JL8. The
entire MC68HC908JL8 data book apply to this ROM device, with exceptions
outlined in this addendum.
MC68HC908JL8 Technical Data, Rev. 2
(Motorola document number MC68HC908JL8/D)
8,192 bytes ROM
36 bytes ROM
Not used;
Defined by mask; read only.
$FC00–$FDFF: Not used.
$FE10–$FFCE: Used for
20-pin PDIP (MC68HC08JK8)
20-pin SOIC (MC68HC08JK8)
28-pin PDIP
28-pin SOIC
32-pin SDIP
32-pin LQFP
locations are reserved.
testing purposes only.
MC68HC08JL8
8,192 bytes FLASH
36 bytes FLASH
FLASH related registers.
$FE08 — FLCR
$FFCF — FLBPR
Read/write FLASH register.
Used for testing and FLASH
20-pin PDIP (MC68HC908JK8)
20-pin SOIC (MC68HC908JK8)
28-pin PDIP
28-pin SOIC
32-pin SDIP
32-pin LQFP
programming/erasing.
MC68HC908JL8
© Motorola, Inc., 2003

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MC68HC908JK8MP Summary of contents

Page 1

... Used for programming/erasing. testing purposes only. 20-pin PDIP (MC68HC08JK8) 20-pin PDIP (MC68HC908JK8) 20-pin SOIC (MC68HC08JK8) 20-pin SOIC (MC68HC908JK8) 28-pin PDIP 28-pin PDIP 28-pin SOIC 28-pin SOIC 32-pin SDIP 32-pin SDIP 32-pin LQFP 32-pin LQFP MC68HC908JL8 © Motorola, Inc., 2003 ...

Page 2

... PTA7/KBI7** ¥ PTA6/KBI6** ‡ PTA5/KBI5** ‡ PTA4/KBI4** ‡ PTA3/KBI3** ## ‡ PTA2/KBI2** ‡ PTA1/KBI1** ‡ PTA0/KBI0** PTB7/ADC7 PTB6/ADC6 PTB5/ADC5 PTB4/ADC4 PTB3/ADC3 PTB2/ADC2 PTB1/ADC1 PTB0/ADC0 ADC12/T2CLK # †‡ PTD7/RxD** †‡ PTD6/TxD** PTD5/T1CH1 PTD4/T1CH0 ‡ PTD3/ADC8 ‡ PTD2/ADC9 PTD1/ADC10 ## PTD0/ADC11 PTE1/T2CH1 # PTE0/T2CH0 MOTOROLA ...

Page 3

... MOTOROLA I/O REGISTERS ↓ 64 BYTES RESERVED ↓ 32 BYTES RAM ↓ 256 BYTES UNIMPLEMENTED ↓ 55,968 BYTES ROM ↓ 8,192 BYTES UNIMPLEMENTED ↓ 512 BYTES ...

Page 4

... Symbol Min Values same as, and characterized from I DD MC68HC908JL8, but not tested. V 2.1 (2.18) LVI3 = unless otherwise noted (2) Max Unit Typ (3) 4.02 (4.25) 4.48 (4.48) V 4.13 (4.40) 4.59 (4.63) V (2) Max Unit Typ (3) 2.4 (2.49) 2.69 (2.68) V MOTOROLA ...

Page 5

... MC68HC08JL8 MC68HC908JL8 2 MC68HC08JL8 Memory Characteristics Characteristic RAM data retention voltage Notes: Since MC68HC08JL8 is a ROM device, FLASH memory electrical characteristics do not apply. MOTOROLA EXT ° Ω ) Resistor, R EXT Figure 3. RC vs. Frequency (5V @25 ° EXT ° Ω ) Resistor, R EXT Figure 4. RC vs. Frequency (3V @25 ° C) Table 4 ...

Page 6

... C to +85 ° C –40 ° +125 ° C –40 ° +85 ° C –40 ° +125 ° C –40 ° +85 ° C –40 ° +125 ° C –40 ° +85 ° C –40 ° +125 ° only. DD Package 20-pin PDIP 20-pin SOIC 28-pin PDIP 28-pin SOIC 32-pin SDIP 32-pin LQFP MOTOROLA ...

Page 7

... To prevent inadvertently turning off the COP with a STOP instruction, a configuration option is available that disables the STOP instruction. When the STOP bit in the configuration register has the STOP instruction is disabled, execution of a STOP instruction results in an illegal opcode reset. MOTOROLA V DD CLR ...

Page 8

... Motorola was negligent regarding the design or manufacture of the part. Motorola and the Stylized M Logo are registered in the U.S. Patent and Trademark Office. digital dna is a trademark of Motorola, Inc. All other product or service names are the property of their respective owners ...

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