LC72720N Sanyo Semiconductor Corporation, LC72720N Datasheet

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LC72720N

Manufacturer Part Number
LC72720N
Description
Single-Chip RDS Signal-Processing System LSI
Manufacturer
Sanyo Semiconductor Corporation
Datasheet

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Ordering number : EN5877
Overview
The LC72720N and LC72720NM are single-chip system
ICs that implement the signal processing required by the
European Broadcasting Union RDS (Radio Data System)
standard and by the US NRSC (National Radio System
Committee) RDBS (Radio Broadcast Data System)
standard. These ICs include band-pass filter, demodulator,
synchronization, and error correction circuits as well as
data buffer RAM on chip and perform effective error
correction using a soft-decision error correction technique.
Functions
• Band-pass filter: Switched capacitor filter (SCF)
• Demodulator: RDS data clock regeneration and
• Synchronization: Block synchronization detection (with
• Error correction: Soft-decision/hard-decision error
• Buffer RAM: Adequate for 24 blocks of data (about 500
• Data I/O: CCB interface (power on reset)
Features
• Error correction capability improved by soft-decision
• The load on the microcontroller can be reduced by
• Two synchronization detection circuits provide
• Data can be read out starting with the backward-
• Fully adjustment free
• Operating power-supply voltage: 4.5 to 5.5 V
• Operating temperature: –40 to +85°C
• Packages: DIP24S, MFP24
demodulated data reliability information
variable backward and forward protection conditions)
correction
ms) and flag memory
error correction
storing decoded data in the on-chip data buffer RAM.
continuous and stable detection of the synchronization
timing.
protection block data after a synchronization reset.
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
Package Dimensions
unit: mm
3067-DIP24S
unit: mm
3045B-MFP24
Signal-Processing System LSI
LC72720N, 72720NM
[LC72720NM]
[LC72720N]
Single-Chip RDS
51398RM (OT) No. 5877-1/14
SANYO: DIP24S
SANYO: MFP24
CMOS IC

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LC72720N Summary of contents

Page 1

... Ordering number : EN5877 Overview The LC72720N and LC72720NM are single-chip system ICs that implement the signal processing required by the European Broadcasting Union RDS (Radio Data System) standard and by the US NRSC (National Radio System Committee) RDBS (Radio Broadcast Data System) standard. These ICs include band-pass filter, demodulator, ...

Page 2

... Pin Assignment Block Diagram LC72720N, 72720NM No. 5877-2/14 ...

Page 3

... Synchronization and RAM address reset (active high) 14 Vddd Digital system power supply (+ Vssd Digital system ground Note: * Normally function as an output pin. Used as an I/O pin in test mode, which is not available to user applications. LC72720N, 72720NM Function Serial data interface (CCB) I/O Equivalent circuit Output Input Output Input — ...

Page 4

... Data output time Electrical Characteristics in the allowable operating ranges Parameter Input resistance Internal feedback resistance Center frequency –3 dB bandwidth Gain Stop band attenuation Reference voltage output LC72720N, 72720NM Symbol Conditions Vddd, Vdda (Vdda ≤ Vddd + 0 max max CL, DI, CE, SYR, T1, T2, T3, T4, T5, T6, T7, SYNC ...

Page 5

... Not detected (protection function operating) 2. Offset word information flag (3 bits Offset word C’ Unused Unused LC72720N, 72720NM Symbol Conditions V CL, DI, CE, SYR, T1, T2 HIS V 1 DO, T3, T4, T5, T6 SYNC, RDS- CL, DI, CE, SYR XIN : V = Vddd CL, DI, CE, SYR, T1 XIN : DO, SYNC, RDS-ID, T3, T4, T5, T6 ...

Page 6

... Take the data as invalid when EC0 - EC2 = 011 (correction not possible). 8. RDS data (16 bits D15 This data is output with the MSB first and the LSB last. Caution: When error correction was not possible, the input data is output without change. LC72720N, 72720NM ...

Page 7

... If, during 3 blocks, 2 blocks of offset words were detected in the correct order the offset words were detected in the correct order in 2 consecutive blocks. Initial value LC72720N, 72720NM IN1 data, first bit IN2 data, first bit (11) Circuit control (5) Error correction method setting (4) RAM write control ...

Page 8

... When ARI is present, PL1 should be set to 1, since detection is at 0°. In cases where the ARI presence is known in advance, more stable reproduction can be achieved by fixing the demodulation phase in this manner. LC72720N, 72720NM Normal write (See the description of the OWE bit.) After the reset is cleared, start writing from the data prior to the establishment of synchronization, i ...

Page 9

... Number of error blocks ( ≤ B ≤ < B ≤ < B ≤ 48 These pins indicate the number of blocks in a set of 48 blocks that had errors before correction. The output polarity of these pins is fixed at the values listed in the table. LC72720N, 72720NM Decoding method T5 T6 RSFT ERROR 57K — ...

Page 10

... RDDA output RSFT output Timing 2 (mode 3, PT2 = 0) Input data Sync NG Error crrection SYNC output ERROR output CORREC output LC72720N, 72720NM The SYNC pin The RDS-ID pin High (1) Low (0) Notes These states are user settable Users cannot use this state Control When set to 1, soft-decision control data (RSFT) is easier to generate. ...

Page 11

... For the CL normal high state For the CL normal low state Serial data input (IN1, IN2 CL: Normal high Internal data CL: Normal low Internal data LC72720N, 72720NM (MSB · Control data input mode, also referred to as “serial data input” mode · This is a 16-bit data input mode. ...

Page 12

... The CE, CL, DI, and DO pins can be connected to the corresponding pins on other ICs that use the CCB interface. (However, we recommend connecting the DO and CE pins separately if the number of available microcontroller ports allows it.) Serial data timing CL: Normal high Intenal data latch CL: Normal low Intenal data latch LC72720N, 72720NM ≥ 0.75 µ ...

Page 13

... LC72720 is not requesting a read, data consisting of all zeros will be read out) or check whether the DO level goes low within the 256 µs following the completion of the read (if the DO pin goes low, then the request was from another IC). LC72720N, 72720NM Symbol Conditions ...

Page 14

... SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of May, 1998. Specifications and information herein are subject to change without notice. LC72720N, 72720NM PS No. 5877-14/14 ...

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