LXT9782HC Intel Corporation, LXT9782HC Datasheet

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LXT9782HC

Manufacturer Part Number
LXT9782HC
Description
Manufacturer
Intel Corporation
Datasheet

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LXT9762/9782
Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII
General Description
The LXT9782 is an eight-port PHY Fast Ethernet Transceiver that supports IEEE 802.3 physical
layer applications at both 10 and 100 Mbps. The LXT9762 offers the same features and
functionality in a six-port device. This data sheet uses the singular designation “LXT97x2” to
refer to both devices.
The LXT97x2 interfaces multiple Serial Media Independent Interface (SMII) compliant
controllers to 10BASE-T and/or 100BASE-TX media.
All network ports provide a combination twisted-pair (TP) or pseudo-ECL (PECL) interface for
a 10/100BASE-TX or 100BASE-FX connection.
The LXT97x2 provides three discrete LED drivers for each port, and eight global serial LED
outputs. It supports both half- and full-duplex operation at 10 and 100 Mbps and requires only a
single 3.3V power supply.
Application
I
Product Features
I
I
I
I
I
As of January 15, 2001, this document replaces the Level One document
LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII.
100BASE-T, 10/100-TX, or 100BASE-FX Switches and multi-port NICs.
Multiple independent IEEE 802.3-
compliant 10/100 ports with integrated
filters
Proprietary Optimal Signal Processing
(OSP™) design improves SNR by 3 dB
over ideal analog filters
Robust baseline wander correction for
improved 100BASE-TX performance
100BASE-FX fiber-optic capability on all
ports
Supports both auto-negotiation and legacy
systems without auto-negotiation capability
I
I
I
I
I
I
I
I
JTAG boundary scan
Multiple Serial MII (SMII) ports for
independent PHY port operation
Configurable via MDIO port or external
control pins
Maskable interrupts
Very low power consumption
(400 mW per port, typical)
3.3V operation
208-pin PQFP and 272-lead BGA
0-70
o
C ambient temperature range
Order Number: 249039-001
Datasheet
January 2001

Related parts for LXT9782HC

LXT9782HC Summary of contents

Page 1

LXT9762/9782 Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII General Description The LXT9782 is an eight-port PHY Fast Ethernet Transceiver that supports IEEE 802.3 physical layer applications at both 10 and 100 Mbps. The LXT9762 offers the same features and ...

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... Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800- 548-4725 or by visiting Intel’s website at http://www.intel.com. Copyright © Intel Corporation, 2001 *Third-party brands and names are the property of their respective owners. ...

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Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Contents . 1.0 Preliminary Pin Assignments and Signal Descriptions 2.0 Functional Description 2.1 Introduction..........................................................................................................20 2.1.1 OSP™ Architecture ................................................................................20 2.1.2 Comprehensive Functionality .................................................................20 2.2 Interface Descriptions..........................................................................................21 2.2.1 10/100 Network Interface .......................................................................21 ...

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LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII 3.0 Application Information 3.1 Design Recommendations .................................................................................. 46 3.1.1 General Design Guidelines .................................................................... 46 3.1.2 Power Supply Filtering ........................................................................... 46 3.1.3 Power and Ground Plane Layout Considerations .................................. 47 3.1.4 ...

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... Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Figures 1 LXT 9782 Block Diagram ...................................................................................... 9 2 LXT9782HC (PQFP) Preliminary Pin Assignments............................................10 3 LXT9782BC (PBGA) Preliminary Pin Assignments............................................11 4 LXT9762HC (PQFP) Preliminary Pin Assignments ............................................12 5 LXT97x2 Interfaces ............................................................................................21 6 Port Address Scheme .........................................................................................23 7 Management Interface Read Frame Structure ...................................................23 8 Management Interface Write Frame Structure ...

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LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Tables 1 LXT97x2 Serial MII Signal Descriptions.............................................................. 13 2 LXT97x2 Signal Detect/TP Select Signal Descriptions ....................................... 14 3 LXT97x2 Network Interface Signal Descriptions................................................. 14 4 LXT97x2 JTAG Test Signal Descriptions ...

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Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 50 Interrupt Status Register (Address 19, Hex 13) ..................................................74 51 LED Configuration Register (Address 20, Hex 14)..............................................75 52 Transmit Control Register #1 (Address 28).........................................................76 53 Transmit Control Register #2 (Address ...

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LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Revision History Revision Date 8 Description Datasheet ...

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Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Figure 1. LXT 9782 Block Diagram QCLK QSTAT ADD_<4:0> Management / Mode Select MDC Logic & LED MDIO Drivers MDINT Register Set TXDn Parallel/Serial Converter Mgmt Counters 8 LEDS_<7:0> Register ...

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... LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII 1.0 Preliminary Pin Assignments and Signal Descriptions Figure 2. LXT9782HC (PQFP) Preliminary Pin Assignments GNDD....... 1 N/C....... 2 TXD7....... 3 RXD7....... 4 N/C....... 5 N/C....... 6 N/C....... 7 TXD6....... 8 RXD6....... 9 N/C....... 10 N/C....... 11 N/C....... 12 N/C....... 13 N/C....... 14 VCCIO....... 15 GNDD....... 16 TXD5....... 17 RXD5....... 18 N/C ...

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Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Figure 3. LXT9782BC (PBGA) Preliminary Pin Assignments LED/ LED QCLK GNDD CFG1_2 CFG2_2 LED/ B LED GNDD QSTAT CFG0_1 ...

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LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Figure 4. LXT9762HC (PQFP) Preliminary Pin Assignments GNDD .......1 N/C .......2 TXD5 .......3 RXD5 .......4 N/C .......5 N/C .......6 N/C .......7 TXD4 .......8 RXD4 .......9 N/C .......10 N/C .......11 N/C ...

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Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Table 1. LXT97x2 Serial MII Signal Descriptions 9762 9782 Pin# Pin# Symbol PQFP PQFP PBGA TXD0 TXD1 TXD2 ...

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LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Table 2. LXT97x2 Signal Detect/TP Select Signal Descriptions 9762 9782 Pin# Pin# Symbol PQFP PQFP PBGA 101 101 V16 SD0/TP0 100 100 U13 SD1/TP1 99 99 U14 SD2/TP2 161 98 ...

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Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Table 4. LXT97x2 JTAG Test Signal Descriptions 1 97x2 9782 Pin# Pin# Symbol Type PQFP PBGA 163 D14 TDI 164 C15 TDO 165 B16 ...

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LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Table 5. LXT97x2 Miscellaneous Signal Descriptions (Continued) 1 97x2 Pin# Symbol Type PQFP PBGA 97 W16 ADD_4 96 V15 ADD_3 95 V13 ADD_2 94 V14 ADD_1 93 W15 ADD_0 102 ...

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Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Table 6. LXT97x2 Power Supply Signal Descriptions (Continued) 1 97x2 Pin# PQFP PBGA C18, D16, D18, E18, F17, F18, G17, G18, LXT9762 and LXT9782: H18, J18, K17, K18, L17, 103, ...

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LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Table 7. LXT97x2 LED Signal Descriptions (Continued) 9762 9782 Pin# Pin# Symbol PQFP PQFP PBGA 197 197 C7 LED/CFG2_1 198 198 A6 LED/CFG2_2 199 199 B6 LED/CFG2_3 186 194 A7 ...

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Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Table 8. Unused Pins 97x2 Pin# 9782 Pin# PQFP PBGA LXT9762 and A1,A2, B1, B3, C1 D3, E1, E3, F1 LXT9782: - F4, H1, H3, H4, J1, J3, ...

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LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII 2.0 Functional Description 2.1 Introduction The LXT9782 eight-port Fast Ethernet 10/100 Transceiver supports 10 Mbps and 100 Mbps networks. It complies with all applicable requirements of IEEE 802.3. Each port ...

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Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 The LXT97x2 provides an individual serial MII (SMII) for each network port. The SMII ports provide for communication between the Media Access Controllers (MACs) and the network ports. The SMII ...

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LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII The LXT97x2 supports either 100BASE-TX or 10BASE-T connections over 100 Ω, Category 5, Unshielded Twisted Pair (UTP) cable. Only a transformer, RJ-45 connector, load resistor, and bypass capacitors are required ...

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Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 MII Addressing The protocol allows one controller to communicate with multiple LXT97x2 chips. Pins ADD_<4:0> determine the base address. Each port adds its port number (0 through n) to the ...

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LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Figure 8. Management Interface Write Frame Structure MDC MDIO 32 "1" Write) Idle Preamble ST Op Code MII Interrupts The LXT97x2 provides a single interrupt pin ...

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Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 2.3 Operating Requirements 2.3.1 Power Requirements The LXT97x2 requires four power supply inputs, VCCD, VCCR, VCCT and VCCIO. The digital and analog circuits require 3.3 V supplies (VCCD, VCCR and ...

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LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — 100TX, Half-Duplex — 10BASE-T, Full-Duplex — 10BASE-T, Half-Duplex • Allow auto-negotiation / parallel-detection. When the network link is forced to a specific configuration, the LXT97x2 immediately begins operating the ...

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Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Figure 11. Hardware Control Settings LED/CFG Pin LED/CFG Pin 1. LEDs will automatically correct their polarity upon power-up or reset. . Table 9. Hardware Configuration Settings Desired Configuration AutoNeg Speed ...

Page 28

LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII 2.4.3 Power-Down Mode The LXT97x2 offers both global and per-port power-down modes. 2.4.3.1 Global (Hardware) Power Down The global power-down mode is controlled by PWRDWN pin 82 (PQFP) or pin ...

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Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 2.5.1.3 Controlling Auto-Negotiation When auto-negotiation is controlled by software, the following steps are recommended: • After power-up, power-down, or reset, the power-down recovery time, as specified in on page 62, ...

Page 30

LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII • Allows a multi-port MAC/PHY communication with one system clock. • Operates in both half and full duplex. • Supports per-packet switching between 10 Mbps and 100 Mbps data rates. ...

Page 31

Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 . Figure 14. 100Mbps Serial MII Data Flow Serial Data Stream To/From MAC 2.6.1 Reference Clock REFCLK operates at 125 ...

Page 32

LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Figure 15. Serial MII Transmit Synchronization CLOCK SYNC TX TX_ER TX_EN 2.6.4 Receive Data Stream Receive data and control information are signalled in ten bit segments. In 100 Mbps mode ...

Page 33

Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 2.6.5 Loopback A test loopback function is available for 100 Mbps SMII testing. Bit 0.14 must be set High for correct operation. When data is looped back, whatever the MAC ...

Page 34

LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Table 11. RX Status Encoding Bit Definitions (Continued) Signal LINK Inter-frame status bit RXD3 indicates port link status. (RXD3) JABBER Inter-frame status bit RXD4 indicates port jabber status. (RXD4) VALID ...

Page 35

Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 2.7.2 100BASE-X Protocol Sublayer Operations . With respect to the 7-layer communications model, the LXT97x2 is a Physical Layer 1 (PHY) device. The LXT97x2 implements the Physical Coding Sublayer (PCS), ...

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LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Figure 19. Protocol Sublayers PCS Sublayer PMA Sublayer PMD Sublayer Table 12. 4B/5B Coding Code Type DATA 1. The /I/ (Idle) code group is sent continuously between frames. 2. The ...

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Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Table 12. 4B/5B Coding (Continued) Code Type IDLE CONTROL INVALID 1. The /I/ (Idle) code group is sent continuously between frames. 2. The /J/ and /K/ (SSD) code groups are ...

Page 38

LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Link Failure Override The LXT97x2 normally transmits 100 Mbps data packets or Idle symbols only when the link is up, and transmits only FLP bursts when the link is not ...

Page 39

Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Polarity Correction The LXT97x2 automatically detects and corrects for receive signal (TPIP/N) inversion. Reversed polarity is detected if eight inverted link pulses, or four inverted EOF markers, are received consecutively. ...

Page 40

LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII 2.8.1 10T Preamble Handling The LXT97x2 offers two options for preamble handling, selected by bit 16.5. In 10T Mode when 16 the LXT97x2 strips the entire preamble off ...

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Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Each serial output reports a specific status condition for all ports. Ports 0 through 7 are assigned bits 0:7 in each stream (bits 3 and 4 are not used on ...

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LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Figure 20. Serial LED Streams LEDCLK (1 MHz) LEDS(0) activity activity activity (port 0) (port 1) (port 2) LEDS(1) polarity polarity polarity (port 0) (port 1) (port 2) LEDS(2) duplex ...

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Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 • If Link is up AND activity is detected, the LED blinks at the stretch interval selected by bits 20.3:2 and continues to blink as long as activity is present. ...

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LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII when the current received page is the base page. This information is useful for recognizing when next pages must be resent due to a new negotiation process starting. Bits 6.1 ...

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Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 2.10.2 State Machine The TAP controller state machine driven by the TCK and TMS pins. Upon reset, the TEST_LOGIC_RESET state is entered. The state machine is also ...

Page 46

LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII 3.0 Application Information 3.1 Design Recommendations The LXT97x2 complies with IEEE requirements and provides outstanding receive Bit Error Rate (BER) and long-line-length performance. Obtaining maximum performance from the LXT97x2 requires ...

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Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Intel recommends dividing the VCC plane into two sections. The digital section supplies power to the VCCD and VCCIO pins of the LXT97x2. The analog section supplies power to the ...

Page 48

LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII • Avoid vias and layer changes as much as possible. • Keep the transmit and receive pairs apart to avoid cross-talk. • Route the transmit pair adjacent to a ground ...

Page 49

Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 3.2 Typical Application Circuits Figure 24 shows a typical layout of the LXT97x2 twisted-pair interface in a dual-high (stacked) RJ45 application. Figure 23. Power and Ground Supply Connections LXT97x2 GNDS ...

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LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Figure 24. Typical Twisted-Pair Interface LXT97x1 1. The 100Ω transmit load termination resistor typically required is integrated in the LXT97xx. 2. Magnetics without a receive pair center-tap do not require ...

Page 51

Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Figure 25. Typical Fiber Interface 50 Ω TPFONn TPFOPn VCCD +3.3V LXT97x2 SD/TPn 82 Ω GNDD TPFINn TPFIPn 1. Refer to fiber transceiver manufacturer’s recommendations for termination circuitry. Example shown ...

Page 52

LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Figure 26. Typical Serial LED Interface LEDLATCH LXT9782 LEDCLK LEDS(0) See Detail for LXT9761 configuration. LEDLATCH LEDCLK LEDS(1) LEDLATCH LEDCLK LEDS(2) LEDLATCH LEDCLK LEDS(3) 1. Note: The outputs are always ...

Page 53

Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 4.0 Test Specifications Table 17 through Table 34 the LXT97x2. These specifications are guaranteed by test, except where noted “by design.” Minimum and maximum values listed in operating conditions specified ...

Page 54

LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Table 19. Digital I/O Characteristics Parameter 3 Input Low voltage 3 Input High voltage Input current Output Low voltage Output High voltage 1. Applies to all pins except SMII pins. ...

Page 55

Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Table 22. 100BASE-TX Transceiver Characteristics Parameter Peak differential output voltage Signal amplitude symmetry Signal rise/fall time Rise/fall time symmetry Duty cycle distortion Overshoot 1. Typical values are at 25 °C ...

Page 56

LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Figure 27. MII Sync Timing SYNC REFCLK Table 25. MII Sync Timing Parameters Parameter SYNC setup to REFCLK rising edge SYNC delay from REFCLK rising edge 1. Typical values are ...

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Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Figure 29. SMII Output Delay Test Setup DUT LXT9762/82 Ref Clk Figure 30. 100BASE-TX Transmit Timing REFCLK TXD TPFO Table 27. 100BASE-TX Transmit Timing Parameters Parameter TXD setup to REFCLK ...

Page 58

LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Figure 31. 100BASE-FX Receive Timing REFCLK RXD TPFI Table 28. 100BASE-FX Receive Timing Parameters Parameter RXD setup from REFCLK rising edge RXD Rise/Fall Time Receive start of /J/ to CRS ...

Page 59

Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Figure 33. 10BASE-T Receive Timing REFCLK RXD TPFI Table 30. 10BASE-T Receive Timing Parameters Parameter RXD setup from REFCLK rising edge RXD Rise/Fall Time Receive Start-of-Frame to CRS asserted Receive ...

Page 60

LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Figure 35. Auto-Negotiation and Fast Link Pulse Timing Clock Pulse TPOP t1 Figure 36. Fast Link Pulse Timing FLP Burst TPOP t4 Table 32. Auto-Negotiation and Fast Link Pulse Timing ...

Page 61

Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Figure 37. MDIO Write Timing (MDIO Sourced by MAC) MDC MDIO Figure 38. MDIO Read Timing (MDIO Sourced by PHY) MDC MDIO Table 33. MDIO Timing Parameters Parameter MDIO setup ...

Page 62

LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Figure 39. Power-Up Timing VCC MDIO,etc Table 34. Power-Up Timing Parameters Parameter Voltage threshold Power Up delay 1. Typical values are at 25° C and are for design aid only; ...

Page 63

Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 5.0 Register Definitions The LXT97x2 register set includes multiple 16-bit registers, 16 registers per port. a complete register listing. through Table 53 provide individual register definitions. • Base registers (0 ...

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LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII 64 Datasheet ...

Page 65

Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Datasheet 65 ...

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LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Table 38. Control Register (Address 0) Bit Name 1 = PHY reset 0.15 Reset 0 = normal operation 1 = enable loopback mode 2 0.14 Loopback 0 = disable loopback ...

Page 67

Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Table 39. Status Register (Address 1) (Continued) Bit Name 1 = PHY able to operate at 10 Mbps in full-duplex mode 1.12 10 Mbps Full Duplex 0 = PHY not ...

Page 68

LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Table 41. PHY Identification Register 2 (Address 3) Bit Name The PHY identifier composed of bits 19 through 24 of 3.15:10 PHY ID number the OUI. Manufacturer’s 3.9:4 6 bits ...

Page 69

Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Table 42. Auto-Negotiation Advertisement Register (Address 4) (Continued) Bit Name 4.9 100BASE- 100BASE-T4 capability is available 100BASE-T4 capability is not available. (The LXT97x2 does not support ...

Page 70

LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Table 43. Auto-Negotiation Link Partner Base Page Ability Register (Address 5) (Continued) Bit Name 1 = Link Partner is 100BASE-T4 capable. 5.9 100BASE- Link Partner is not 100BASE-T4 ...

Page 71

Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Table 45. Auto-Negotiation Next Page Transmit Register (Address 7) Bit Name Next Page 1 = Additional next pages follow 7.15 (NP Last page 7.14 Reserved Write as 0, ...

Page 72

LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Table 47. Port Configuration Register (Address 16, Hex 10) Bit Name 16.15 Reserved This bit is ignored by the LXT97x2 Forces internal registers and state machines to Link ...

Page 73

Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Table 48. Quick Status Register (Address 17, Hex 11) (Continued) Bit Name 1 = LXT97x2 is receiving a packet 17.12 Receive Status 0 = LXT97x2 is not receiving a packet ...

Page 74

LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Table 49. Interrupt Enable Register (Address 18, Hex 12) (Continued) Bit Name 18.2 Reserved Write as 0, ignore on read. 18.1 INTEN 1 = Enable interrupts on this port. 0 ...

Page 75

Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 Table 51. LED Configuration Register (Address 20, Hex 14) Bit Name 0000 = Display Speed Status (Continuous, Default) 0001 = Display Transmit Status (Stretched) 0010 = Display Receive Status (Stretched) ...

Page 76

LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Table 51. LED Configuration Register (Address 20, Hex 14) (Continued) Bit Name 00 = Stretch LED events Stretch LED events 20.3:2 LEDFREQ ...

Page 77

... Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII — LXT9762/9782 6.0 Package Specifications Figure 42. LXT97x2 PQFP Package Specification 208-Pin Plastic Quad Flat Package • Part Number LXT9762HC (6-port model) • Part Number LXT9782HC (8-port model) • Commercial Temperature Range (0 ° ° ...

Page 78

LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII Figure 43. LXT97x2 PBGA Package Specification 272-Lead Plastic Ball Grid Array • Part Number LXT9782BC (8-port model) • Commercial Temperature Range (0 ° ° C) 27.00 ±0.20 ...

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