UPD3728D NEC, UPD3728D Datasheet

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UPD3728D

Manufacturer Part Number
UPD3728D
Description
7300-bit color linear image sensor
Manufacturer
NEC
Datasheet

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Document No. S13878EJ1V0DS00(1st edition)
Date published April 1999 N CP(K)
Printed in Japan
changes optical images to electrical signal and has the function of color separation.
transfer register, which transfers the photo signal electrons of 7300 pixels separately in odd and even pixels.
Therefore, it is suitable for 600 dpi/A3 high-speed color digital copiers and so on.
FEATURES
• Valid photocell
• Photocell's pitch : 10 m
• Line spacing
• Color filter
• Resolution
• Drive clock level : CMOS output under 5 V operation
• Data rate
• Output type
• Power supply
• On-chip circuits
ORDERING INFORMATION
Part Number
The PD3728 is a high-speed and high sensitive color CCD (Charge Coupled Device) linear image sensor which
The PD3728 has 3 rows of 7300 pixels, and it is a 2-output/color type CCD sensor with 2 rows/color of charge
PD3728D
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability
and additional information.
7300 PIXELS
: 7300 pixels
: 40 m (4 lines) Red line-Green line, Green line-Blue line
: Primary colors (red, green and blue), pigment filter (with light resistance 10
: 24 dot/mm (600 dpi) A3 (297
: 40 MHz MAX. (20 MHz/1 output)
: 2 outputs in phase/color
: +12 V
: Reset feed-through level clamp circuits
Voltage amplifiers
CCD linear image sensor 36-pin ceramic DIP (600 mil)
3
3 COLOR CCD LINEAR IMAGE SENSOR
DATA SHEET
Package
420 mm) size (shorter side)
MOS INTEGRATED CIRCUIT
PD3728
7
©
lx•hour)
1999

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UPD3728D Summary of contents

Page 1

... CCD linear image sensor 36-pin ceramic DIP (600 mil) The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. S13878EJ1V0DS00(1st edition) ...

Page 2

BLOCK DIAGRAM CLB GND V 2 OUT 32 (Blue, even) GND OUT 34 (Blue, odd) GND OUT 36 (Green, odd OUT 1 (Green, even) GND ...

Page 3

... GND 6 31 GND Reset feed-through level CLB OD clamp clock Last stage shift register clock Shift register clock connection connection connection Shift register clock Shift register clock 1 TG3 TG1 Transfer gate clock 1 (for Blue GND 16 21 TG2 Transfer gate clock 2 (for Green ...

Page 4

ABSOLUTE MAXIMUM RATINGS (T Parameter Output drain voltage Shift register clock voltage Reset gate clock voltage Reset feed-through level clamp clock voltage Transfer gate clock voltage Operating ambient temperature Storage temperature Caution Exposure to ABSOLUTE MAXIMUM RATINGS for extended periods ...

Page 5

ELECTRICAL CHARACTERISTICS MHz, data rate = 2 MHz, storage time = 10 ms light source: 3200 K halogen lamp +C-500S (infrared cut filter 1mm), ...

Page 6

... Last stage shift register clock pin capacitance Reset gate clock pin capacitance Reset feed-through level clamp clock pin capacitance Transfer gate clock pin capacitance Remark Pins 13 and pin 9 ( 10) are connected each other inside of the device. Pins 14 and pin 28 ( 20) are connected each other inside of the device Symbol Pin name Pin No ...

Page 7

TIMING CHART 1 (Bit clamp mode, for each color) TG1 to TG3 CLB Note OUT OUT Note Input the RB and CLB pulses continuously ...

Page 8

TIMING CHART 2 (Bit clamp mode, for each color 10 20 CLB OUT V 6 OUT Symbol t1, t2 t1’, t2’ t5, t6 ...

Page 9

Notes 1. MIN. of t10 shows that the RB and CLB overlap each other. RB CLB 2. MIN. of t11 shows that the 1L and CLB overlap each other. 1L CLB 90 % t10 t11 90 ...

Page 10

TIMING CHART 3 (Bit clamp mode, for each color) TG1 to TG3 CLB Symbol t11 t12 t13, t14 t15, t16 Notes 1. Input the RB and CLB pulses continuously during this period, ...

Page 11

TIMING CHART 4 (Line clamp mode, for each color) TG1 to TG3 CLB Note OUT OUT Note Set the RB to high level during ...

Page 12

TIMING CHART 5 (Line clamp mode, for each color 10 20 t1' RB “H” CLB OUT V 6 OUT Symbol t1, t2 t1’, t2’ t5, ...

Page 13

TIMING CHART 6 (Line clamp mode, for each color) TG1 to TG3 CLB Symbol t12 t13, t14 t15, t16 t17, t18 t19 t20, t21 Note Set the RB to high ...

Page 14

DEFINITIONS OF CHARACTERISTIC ITEMS 1. Saturation voltage: V sat Output signal voltage at which the response linearity is lost. 2. Saturation exposure: SE Product of intensity of illumination (I 3. Photo response non-uniformity: PRNU The output signal non-uniformity of all ...

Page 15

Dark signal non-uniformity: DSNU Absolute maximum of the difference between ADS and voltage of the highest or lowest output pixel of all the valid pixels at light shielding. This is calculated by the following formula. DSNU (mV) : maximum ...

Page 16

Register imbalance: RI The rate of the difference between the averages of the output voltage of Odd and Even pixels, against the average output voltage of all the valid pixels – – ...

Page 17

STANDARD CHARACTERISTIC CURVES (Nominal) DARK OUTPUT TEMPERATURE CHARACTERISTIC 0.5 0.25 0 Operating Ambient Temperature T TOTAL SPECTRAL RESPONSE CHARACTERISTICS B 100 400 500 STORAGE TIME OUTPUT ...

Page 18

APPLICATION CIRCUIT EXAMPLE + F/ Remarks 1. Pin 9 ( 10) and pin 28 ( 20) should be open to decrease the influence of ...

Page 19

EQUIVALENT CIRCUIT +12 V 4.7 k 110 2SC945 47 CCD 2SA1005 V OUT DATA SHEET S13878EJ1V0DS00 PD3728 ...

Page 20

PACKAGE DRAWING CCD LINEAR IMAGE SENSOR 36-PIN CERAMIC DIP (600mil) (Unit : mm) 94.00 0.50 1 9.5 0.9 2 (35.0) The 1st valid pixel 88.9 0.6 1 The 1st valid pixel 2 The 1st valid pixel 3 The surface of ...

Page 21

NOTES ON THE USE OF THE PACKAGE The application of an excessive load to the package may cause the package to warp or break, or cause chips to come off internally. Particular care should be taken when mounting the package ...

Page 22

DATA SHEET S13878EJ1V0DS00 PD3728 ...

Page 23

... HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction connection is provided to the input pins possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry ...

Page 24

... Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance ...

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