MC9S12DG256VPV Freescale Semiconductor, Inc, MC9S12DG256VPV Datasheet

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MC9S12DG256VPV

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MC9S12DG256VPV
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Freescale Semiconductor, Inc
Datasheet

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Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or
design. Motorola does not assume any liability arising out of the application or use of any product or circuit described herein;
neither does it convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to
support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where
personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized
application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless
against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of
personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was
negligent regarding the design or manufacture of the part.
MC9S12A256, MC9S12DJ256
Freescale Semiconductor, Inc.
Device User Guide
Original Release Date: 24 March 2003
For More Information On This Product,
MC9S12DG256,
MC9S12DT256
Covers also
Revised:26 July 2003
Go to: www.freescale.com
V03.03
Motorola, Inc
DOCUMENT NUMBER
9S12DT256DGV3/D
1

Related parts for MC9S12DG256VPV

MC9S12DG256VPV Summary of contents

Page 1

... Freescale Semiconductor, Inc. Device User Guide MC9S12A256, MC9S12DJ256 Original Release Date: 24 March 2003 Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Motorola does not assume any liability arising out of the application or use of any product or circuit described herein; ...

Page 2

... Freescale Semiconductor, Inc. Revision History Version Revision Effective Number Date Date 24 March V03.00 2003 30 June V03.01 2003 24 July V03.02 2003 26 July V03.03 2003 Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Motorola does not assume any liability arising out of the application or use of any product or circuit described herein; ...

Page 3

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — 9S12DT256DGV3/D V03.03 For More Information On This Product, Go to: www.freescale.com 3 ...

Page 4

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — 9S12DT256DGV3/D V03.03 4 For More Information On This Product, Go to: www.freescale.com ...

Page 5

... Freescale Semiconductor, Inc. Table of Contents Section 1 IntroductionMC9S12DT256 1.1 Overview .19 1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 1.3 Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 1.4 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 1.5 Device Memory Map .24 1.6 Detailed Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 1.7 Part ID Assignments .50 Section 2 Signal Description 2.1 Device Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51 2.2 Signal Properties Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .53 2.3 Detailed Signal Descriptions .56 2.3.1 EXTAL, XTAL — ...

Page 6

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 2.3.21 PH7 / KWH7 / SS2 — Port H I/O Pin .61 2.3.22 PH6 / KWH6 / SCK2 — Port H I/O Pin .61 2.3.23 PH5 / KWH5 / MOSI2 — Port H I/O Pin .61 2.3.24 PH4 / KWH4 / MISO2 — Port H I/O Pin .61 2.3.25 PH3 / KWH3 / SS1 — ...

Page 7

... Freescale Semiconductor, Inc. 2.3.57 PS0 / RXD0 — Port S I/O Pin .66 2.3.58 PT[7:0] / IOC[7:0] — Port T I/O Pins [7: .66 2.4 Power Supply Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .66 2.4.1 VDDX,VSSX — Power & Ground Pins for I/O Drivers . . . . . . . . . . . . . . . . . . . . . . . .66 2.4.2 VDDR, VSSR — Power & Ground Pins for I/O Drivers & for Internal Voltage Regulator 66 2 ...

Page 8

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 6.1 CPU12 Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79 6.2 HCS12 Module Mapping Control (MMC) Block Description . . . . . . . . . . . . . . . . . . . . . .79 6.2.1 Device specific information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79 6.3 HCS12 Multiplexed External Bus Interface (MEBI) Block Description . . . . . . . . . . . . . .79 6.3.1 Device specific information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79 6.4 HCS12 Interrupt (INT) Block description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79 6 ...

Page 9

... Freescale Semiconductor, Inc. Appendix A Electrical Characteristics A.1 General .89 A.1.1 Parameter Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .89 A.1.2 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .89 A.1.3 Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .90 A.1.4 Current Injection .91 A.1.5 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .91 A.1.6 ESD Protection and Latch-up Immunity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .92 A.1.7 Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .93 A.1.8 Power Dissipation and Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .93 A.1.9 I/O Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .95 A ...

Page 10

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 10 For More Information On This Product, Go to: www.freescale.com ...

Page 11

... Freescale Semiconductor, Inc. List of Figures Figure 0-1 Order Partnumber Example .15 Figure 1-1 MC9S12DT256 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 Figure 1-2 MC9S12DT256 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 Figure 2-1 Pin Assignments in 112-pin LQFP .52 Figure 2-2 Pin Assignments in 80-pin QFP for MC9S12DJ256 . . . . . . . . . . . . . . . . . . . . . .53 Figure 2-3 PLL Loop Filter Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 Figure 2-4 Colpitts Oscillator Connections (PE7=1) ...

Page 12

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 12 For More Information On This Product, Go to: www.freescale.com ...

Page 13

... Freescale Semiconductor, Inc. List of Tables Table 0-1 Derivative Differences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Table 0-2 Document References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Table 0-3 Specification Change Summary for Maskset L91N . . . . . . . . . . . . . . . . . . . . . . . .17 Table 1-1 Device Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Table 1-2 Detailed MSCAN Foreground Receive and Transmit Buffer Layout .43 Table 1-3 Assigned Part ID Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 Table 1-4 Memory size registers ...

Page 14

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 Table A-21 Expanded Bus Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .123 14 For More Information On This Product, Go to: www.freescale.com ...

Page 15

... Freescale Semiconductor, Inc. Derivative Differences and Document References Derivative Differences Table 0-1 shows the availability of peripheral modules on the various derivatives. For details about the compatibility within the MC9S12D-Family refer also to engineering bulletin EB386. Generic MC9S12A256 device # of CANs 0 CAN0 — CAN1 — ...

Page 16

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 The following items should be considered when using a derivative (Table 0-1): • Registers – Do not write or read CAN0 registers (after reset: address range $0140 - $017F), if using a derivative without CAN0. – Do not write or read CAN1registers (after reset: address range $0180 - $01BF), if using a derivative without CAN1. – ...

Page 17

... Freescale Semiconductor, Inc. The Device Guide provides information about the MC9S12DT256 device made up of standard HCS12 blocks and the HCS12 processor core. This document is part of the customer documentation. A complete set of device manuals also includes the HCS12 Core User Guide and all the individual Block Guides of the implemented modules effort to reduce redundancy all module specific information is located only in the respective Block Guide ...

Page 18

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 Table 0-3 Specification Change Summary for Maskset L91N Block EETS4K/FTS256K PIM_9DP256 18 For More Information On This Product, Spec Change Reliability Specification for Non Volatile Memories CAN0 can be routed to PORTJ Go to: www.freescale.com ...

Page 19

... Freescale Semiconductor, Inc. User Guide End Sheet For More Information On This Product, MC9S12DT256 Device User Guide — V03.03 Go to: www.freescale.com 129 ...

Page 20

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 130 For More Information On This Product, FINAL PAGE OF 130 PAGES Go to: www.freescale.com ...

Page 21

... Freescale Semiconductor, Inc. Section 1 IntroductionMC9S12DT256 1.1 Overview The MC9S12DT256 microcontroller unit (MCU 16-bit device composed of standard on-chip peripherals including a 16-bit central processing unit (HCS12 CPU), 256K bytes of Flash EEPROM, 12K bytes of RAM, 4K bytes of EEPROM, two asynchronous serial communications interfaces (SCI), three ...

Page 22

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 – Programmable rising or falling edge trigger • Memory – 256K Flash EEPROM – 4K byte EEPROM – 12K byte RAM • Two 8-channel Analog-to-Digital Converters – 10-bit resolution – External conversion trigger capability • ...

Page 23

... Freescale Semiconductor, Inc. – Compatible with I2C Bus standard – Multi-master operation – Software programmable for one of 256 different serial clock frequencies • 112-Pin LQFP package – I/O lines with 5V input and drive capability – 5V A/D converter inputs – Operation at 50MHz equivalent to 25MHz Bus Speed – ...

Page 24

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 1.4 Block Diagram Figure 1-1 shows a block diagram of the MC9S12DT256 device. 22 For More Information On This Product, Go to: www.freescale.com ...

Page 25

... Freescale Semiconductor, Inc. Figure 1-1 MC9S12DT256 Block Diagram 256K Byte Flash EEPROM 12K Byte RAM 4K Byte EEPROM VDDR VSSR VREGEN Voltage Regulator VDD1,2 VSS1,2 Single-wire Background BKGD CPU12 Debug Module XFC Clock and VDDPLL Reset PLL Periodic Interrupt VSSPLL Generation EXTAL ...

Page 26

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 1.5 Device Memory Map Table 1-1 and Figure 1-2 show the device memory map of the MC9S12DT256 after reset. Note that after reset the bottom 1k of the EEPROM ($0000 - $03FF) are hidden by the register space. ...

Page 27

... Freescale Semiconductor, Inc. Table 1-1 Device Memory Map Address $1000 - $3FFF RAM array Fixed Flash EEPROM array $4000 - $7FFF incl. 0.5K, 1K Protected Sector at start $8000 - $BFFF Flash EEPROM Page Window Fixed Flash EEPROM array incl. 0.5K, 1K Protected Sector at end $C000 - $FFFF ...

Page 28

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 Figure 1-2 MC9S12DT256 Memory Map $0000 $0400 $1000 $4000 $8000 EXTERN $C000 $FF00 VECTORS VECTORS $FFFF EXPANDED* NORMAL SINGLE CHIP * Assuming that a ‘0’ was driven onto port K bit 7 during MCU is reset into normal expanded wide or narrow mode. ...

Page 29

... Freescale Semiconductor, Inc. 1.6 Detailed Register Map The following tables show the detailed register map of the MC9S12DT256. $0000 - $000F Address Name Read: $0000 PORTA Write: Read: $0001 PORTB Write: Read: $0002 DDRA Write: Read: $0003 DDRB Write: Read: $0004 Reserved Write: ...

Page 30

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 $0010 - $0014 Address Name Read: $0012 INITEE Write: Read: $0013 MISC Write: Read: $0014 Reserved Write: $0015 - $0016 Address Name Read: $0015 ITCR Write: Read: $0016 ITEST Write: $0017 - $0017 Address Name ...

Page 31

... Freescale Semiconductor, Inc. $001E - $001E MEBI map (Core User Guide) Address Name Bit 7 Read: $001E INTCR IRQE Write: $001F - $001F INT map (Core User Guide) Address Name Bit 7 Read: $001F PSEL7 HPRIO Write: $0020 - $0027 Reserved Address Name Bit 7 Read: 0 $0020 ...

Page 32

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 $0028 - $002F Address Name Read: $002D BKP1X Write: Read: $002E BKP1H Write: Read: $002F BKP1L Write: $0030 - $0031 Address Name Read: $0030 PPAGE Write: Read: $0031 Reserved Write: $0032 - $0033 Address Name ...

Page 33

... Freescale Semiconductor, Inc. $0034 - $003F CRG (Clock and Reset Generator) Address Name Bit 7 FORBYP Read: $003D RTIBYP COPBYP TEST ONLY Write: CTCTL Read: TCTL7 $003E TEST ONLY Write: Read: 0 $003F ARMCOP Write: Bit 7 $0040 - $007F ECT (Enhanced Capture Timer 16 Bit 8 Channels) ...

Page 34

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 $0040 - $007F Address Name Read: $0053 TC1 (lo) Write: Read: $0054 TC2 (hi) Write: Read: $0055 TC2 (lo) Write: Read: $0056 TC3 (hi) Write: Read: $0057 TC3 (lo) Write: Read: $0058 TC4 (hi) Write: Read: $0059 TC4 (lo) ...

Page 35

... Freescale Semiconductor, Inc. $0040 - $007F ECT (Enhanced Capture Timer 16 Bit 8 Channels) Address Name Bit 7 Read: $006C Reserved Write: TIMTST Read: 0 $006D Test Only Write: Read: $006E Reserved Write: Read: $006F Reserved Write: Read: 0 $0070 PBCTL Write: Read: 0 $0071 PBFLG Write: Read: ...

Page 36

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 $0080 - $009F Address Name Read: $0082 ATD0CTL2 Write: Read: $0083 ATD0CTL3 Write: Read: $0084 ATD0CTL4 Write: Read: $0085 ATD0CTL5 Write: Read: $0086 ATD0STAT0 Write: Read: $0087 Reserved Write: Read: $0088 ATD0TEST0 Write: ...

Page 37

... Freescale Semiconductor, Inc. $0080 - $009F ATD0 (Analog to Digital Converter 10 Bit 8 Channel) Address Name Bit 7 Read: Bit7 $009B ATD0DR5L Write: Read: Bit15 $009C ATD0DR6H Write: Read: Bit7 $009D ATD0DR6L Write: Read: Bit15 $009E ATD0DR7H Write: Read: Bit7 $009F ATD0DR7L Write: $00A0 - $00C7 ...

Page 38

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 $00A0 - $00C7 Address Name Read: $00B1 PWMCNT5 Write: Read: $00B2 PWMCNT6 Write: Read: $00B3 PWMCNT7 Write: Read: $00B4 PWMPER0 Write: Read: $00B5 PWMPER1 Write: Read: $00B6 PWMPER2 Write: Read: $00B7 PWMPER3 Write: ...

Page 39

... Freescale Semiconductor, Inc. $00C8 - $00CF SCI0 (Asynchronous Serial Interface) Address Name Bit 7 Read: 0 $00C8 SCI0BDH Write: Read: $00C9 SBR7 SCI0BDL Write: Read: $00CA LOOPS SCISWAI SCI0CR1 Write: Read: $00CB SCI0CR2 TIE Write: Read: TDRE $00CC SCI0SR1 Write: Read: 0 $00CD SCI0SR2 Write: ...

Page 40

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 $00D8 - $00DF Address Name Read: $00DC Reserved Write: Read: $00DD SPI0DR Write: Read: $00DE Reserved Write: Read: $00DF Reserved Write: $00E0 - $00E7 Address Name Read: $00E0 IBAD Write: Read: $00E1 IBFD Write: ...

Page 41

... Freescale Semiconductor, Inc. $00F0 - $00F7 SPI1 (Serial Peripheral Interface) Address Name Bit 7 Read: $00F0 SPI1CR1 SPIE Write: Read: 0 $00F1 SPI1CR2 Write: Read: 0 $00F2 SPI1BR Write: Read: SPIF $00F3 SPI1SR Write: Read: 0 $00F4 Reserved Write: Read: $00F5 Bit7 SPI1DR Write: Read: 0 $00F6 ...

Page 42

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 $0100 - $010F Address Name Read: $0104 FPROT Write: Read: $0105 FSTAT Write: Read: $0106 FCMD Write: Reserved for Read: $0107 Factory Test Write: Read: $0108 FADDRHI Write: Read: $0109 FADDRLO Write: Read: ...

Page 43

... Freescale Semiconductor, Inc. $0110 - $011B EEPROM Control Register (eets4k) Address Name Bit 7 Read: $0119 Bit 7 EADDRLO Write: Read: $011A Bit 15 EDATAHI Write: Read: $011B EDATALO Bit 7 Write: $011C - $011F Reserved for RAM Control Register Address Name Bit 7 Read: 0 $011C Reserved Write: ...

Page 44

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 $0120 - $013F Address Name Read: $012D ATD1DIEN Write: Read: $012E Reserved Write: Read: $012F PORTAD1 Write: Read: $0130 ATD1DR0H Write: Read: $0131 ATD1DR0L Write: Read: $0132 ATD1DR1H Write: Read: $0133 ATD1DR1L Write: ...

Page 45

... Freescale Semiconductor, Inc. $0140 - $017F CAN0 (Motorola Scalable CAN - MSCAN) Address Name Bit 7 Read: $0143 SAMP CAN0BTR1 Write: Read: $0144 WUPIF CAN0RFLG Write: Read: $0145 CAN0RIER WUPIE Write: Read: 0 $0146 CAN0TFLG Write: Read: 0 $0147 CAN0TIER Write: Read: 0 $0148 CAN0TARQ Write: Read: ...

Page 46

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 Table 1-2 Detailed MSCAN Foreground Receive and Transmit Buffer Layout Address Name Extended ID Read: $xxx2 Standard ID Read: CANxRIDR2 Write: Extended ID Read: $xxx3 Standard ID Read: CANxRIDR3 Write: Read: $xxx4- CANxRDSR0 - $xxxB CANxRDSR7 Write: ...

Page 47

... Freescale Semiconductor, Inc. $0180 - $01BF CAN1 (Motorola Scalable CAN - MSCAN) Address Name Bit 7 Read: $0180 CAN1CTL0 RXFRM Write: Read: $0181 CANE CAN1CTL1 Write: Read: $0182 SJW1 CAN1BTR0 Write: Read: $0183 CAN1BTR1 SAMP Write: Read: $0184 WUPIF CAN1RFLG Write: Read: $0185 WUPIE ...

Page 48

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 $0180 - $01BF Address Name Read: $0199 CAN1IDAR5 Write: Read: $019A CAN1IDAR6 Write: Read: $019B CAN1IDAR7 Write: Read: $019C CAN1IDMR4 Write: Read: $019D CAN1IDMR5 Write: Read: $019E CAN1IDMR6 Write: Read: $019F CAN1IDMR7 Write: ...

Page 49

... Freescale Semiconductor, Inc. $0240 - $027F PIM (Port Integration Module PIM_9DP256) Address Name Bit 7 Read: $024D PPSS7 PPSS Write: Read: $024E WOMS7 WOMS6 WOMS5 WOMS4 WOMS3 WOMS2 WOMS1 WOMS0 WOMS Write: Read: 0 $024F Reserved Write: Read: $0250 PTM7 PTM Write: Read: PTIM7 ...

Page 50

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 $0240 - $027F Address Name Read: $0266 PIEH Write: Read: $0267 PIFH Write: Read: $0268 PTJ Write: Read: $0269 PTIJ Write: Read: $026A DDRJ Write: Read: $026B RDRJ Write: Read: $026C PERJ Write: ...

Page 51

... Freescale Semiconductor, Inc. $0280 - $02BF CAN4 (Motorola Scalable CAN - MSCAN) Address Name Bit 7 Read: 0 $028C Reserved Write: Read: 0 $028D Reserved Write: Read: RXERR7 RXERR6 RXERR5 RXERR4 RXERR3 RXERR2 RXERR1 RXERR0 $028E CAN4RXERR Write: Read: TXERR7 TXERR6 TXERR5 TXERR4 TXERR3 TXERR2 TXERR1 TXERR0 ...

Page 52

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 $02C0 - $03FF Address Name Read: $02C0 Reserved - $03FF Write: 1.7 Part ID Assignments The part ID is located in two 8-bit registers PARTIDH and PARTIDL (addresses $001A and $001B after reset). The read-only value is a unique part ID for each revision of the chip. Table 1-3 shows the assigned part ID number ...

Page 53

... Freescale Semiconductor, Inc. Section 2 Signal Description This section describes signals that connect off-chip. It includes a pinout diagram, a table of signal properties, and detailed discussion of signals built from the signal description sections of the Block User Guides of the individual IP blocks on the device. 2.1 Device Pinout ...

Page 54

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 SS1/PWM3/KWP3/PP3 1 SCK1/PWM2/KWP2/PP2 2 MOSI1/PWM1/KWP1/PP1 3 MISO1/PWM0/KWP0/PP0 4 XADDR17/PK3 5 XADDR16/PK2 6 XADDR15/PK1 7 XADDR14/PK0 8 IOC0/PT0 9 IOC1/PT1 10 IOC2/PT2 11 IOC3/PT3 12 VDD1 13 VSS1 14 IOC4/PT4 15 IOC5/PT5 16 IOC6/PT6 17 IOC7/PT7 18 XADDR19/PK5 19 XADDR18/PK4 20 KWJ1/PJ1 21 KWJ0/PJ0 22 MODC/TAGHI/BKGD 23 ADDR0/DATA0/PB0 24 ADDR1/DATA1/PB1 25 ADDR2/DATA2/PB2 26 ADDR3/DATA3/PB3 27 ADDR4/DATA4/PB4 28 Figure 2-1 Pin Assignments in 112-pin LQFP ...

Page 55

... Freescale Semiconductor, Inc. SS1/PWM3/KWP3/PP3 1 SCK1/PWM2/KWP2/PP2 2 MOSI1/PWM1/KWP1/PP1 3 MISO1/PWM0/KWP0/PP0 4 IOC0/PT0 5 IOC1/PT1 6 IOC2/PT2 7 IOC3/PT3 8 VDD1 9 VSS1 10 IOC4/PT4 11 IOC5/PT5 12 IOC6/PT6 13 IOC7/PT7 14 MODC/TAGHI/BKGD 15 ADDR0/DATA0/PB0 16 ADDR1/DATA1/PB1 17 ADDR2/DATA2/PB2 18 ADDR3/DATA3/PB3 19 ADDR4/DATA4/PB4 20 Figure 2-2 Pin Assignments in 80-pin QFP for MC9S12DJ256 2.2 Signal Properties Summary Table 2-1summarizes the pin functionality. Signals shown in bold are not available in the 80 pin package. ...

Page 56

... PE2 R/W — PE1 IRQ — PE0 XIRQ — PH7 KWH7 SS2 PH6 KWH6 SCK2 PH5 KWH5 MOSI2 54 Freescale Semiconductor, Inc. Pin Name Pin Name Power Funct. 4 Funct. 5 Supply CTRL — — VDDPLL — — VDDPLL — — VDDR None — ...

Page 57

... RXCAN0 PM1 TXCAN0 TXB PM0 RXCAN0 RXB PP7 KWP7 PWM7 PP6 KWP6 PWM6 PP5 KWP5 PWM5 Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 Pin Name Pin Name Power Funct. 4 Funct. 5 Supply CTRL PERH/ — — VDDR PPSH PERH/ — ...

Page 58

... EXTAL input frequency. XTAL is the crystal output. 2.3.2 RESET — External Reset Pin An active low bidirectional control signal, it acts as an input to initialize the MCU to a known start-up state, and an output when an internal MCU function causes a reset. 56 Freescale Semiconductor, Inc. Pin Name Pin Name Power Funct. 4 Funct ...

Page 59

... Freescale Semiconductor, Inc. 2.3.3 TEST — Test Pin This input only pin is reserved for test. NOTE: The TEST pin must be tied to VSS in all applications. 2.3.4 VREGEN — Voltage Regulator Enable Pin This input only pin enables or disables the on-chip voltage regulator. ...

Page 60

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 2.3.9 PAD7 / AN07 / ETRIG0 — Port AD Input Pin of ATD0 PAD7 is a general purpose input pin and analog input AN7 of the analog to digital converter ATD0. It can act as an external trigger input for the ATD0. ...

Page 61

... Freescale Semiconductor, Inc. Figure 2-4 Colpitts Oscillator Connections (PE7=1) EXTAL MCU XTAL * Due to the nature of a translated ground Colpitts oscillator a DC voltage bias is applied to the crystal .Please contact the crystal manufacturer for crystal DC Figure 2-5 Pierce Oscillator Connections (PE7=0) EXTAL MCU ...

Page 62

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 Figure 2-6 External Clock Connections (PE7=0) MCU 2.3.14 PE6 / MODB / IPIPE1 — Port E I/O Pin 6 PE6 is a general purpose input or output pin used as a MCU operating mode select pin during reset. The state of this pin is latched to the MODB bit at the rising edge of RESET. This pin is shared with the instruction queue tracking signal IPIPE1 ...

Page 63

... Freescale Semiconductor, Inc. 2.3.18 PE2 / R/W — Port E I/O Pin 2 PE2 is a general purpose input or output pin. In MCU expanded modes of operations, this pin drives the read/write output signal for the external bus. It indicates the direction of data on the external bus. 2.3.19 PE1 / IRQ — Port E Input Pin 1 PE1 is a general purpose input pin and the maskable interrupt request input that provides a means of applying asynchronous interrupt requests ...

Page 64

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 2.3.26 PH2 / KWH2 / SCK1 — Port H I/O Pin 2 PH2 is a general purpose input or output pin. It can be configured to generate an interrupt causing the MCU to exit STOP or WAIT mode. It can be configured as serial clock pin SCK of the Serial Peripheral Interface 1 (SPI1). 2.3.27 PH1 / KWH1 / MOSI1 — ...

Page 65

... Freescale Semiconductor, Inc. 2.3.33 PK[5:0] / XADDR[19:14] — Port K I/O Pins [5:0] PK5-PK0 are general purpose input or output pins. In MCU expanded modes of operation, these pins provide the expanded address XADDR[19:14] for the external bus. 2.3.34 PM7 / TXCAN4 — Port M I/O Pin 7 PM7 is a general purpose input or output pin. It can be configured as the transmit pin TXCAN of the Motorola Scalable Controller Area Network controller 4 (CAN4 ). 2.3.35 PM6 / RXCAN4 — ...

Page 66

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 2.3.40 PM1 / TXCAN0 / TXB — Port M I/O Pin 1 PM1 is a general purpose input or output pin. It can be configured as the transmit pin TXCAN of the Motorola Scalable Controller Area Network controller 0 (CAN0). It can be configured as the transmit pin TXB of the BDLC. 2.3.41 PM0 / RXCAN0 / RXB — ...

Page 67

... Freescale Semiconductor, Inc. 2.3.47 PP2 / KWP2 / PWM2 / SCK1 — Port P I/O Pin 2 PP2 is a general purpose input or output pin. It can be configured to generate an interrupt causing the MCU to exit STOP or WAIT mode. It can be configured as Pulse Width Modulator (PWM) channel 2 output. It can be configured as serial clock pin SCK of the Serial Peripheral Interface 1 (SPI1). ...

Page 68

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 2.3.55 PS2 / RXD1 — Port S I/O Pin 2 PS2 is a general purpose input or output pin. It can be configured as the receive pin RXD of Serial Communication Interface 1 (SCI1). 2.3.56 PS1 / TXD0 — Port S I/O Pin 1 PS1 is a general purpose input or output pin. It can be configured as the transmit pin TXD of Serial Communication Interface 0 (SCI0). 2.3.57 PS0 / RXD0 — ...

Page 69

... Freescale Semiconductor, Inc. 2.4.3 VDD1, VDD2, VSS1, VSS2 — Core Power Pins Power is supplied to the MCU through VDD and VSS. Because fast signal transitions place high, short-duration current demands on the power supply, use bypass capacitors with high-frequency characteristics and place them as close to the MCU as possible. This 2.5V supply is derived from the internal voltage regulator ...

Page 70

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 Pin Number Nominal Mnemonic Voltage 112-pin QFP V 43 DDPLL V 45 SSPLL VREGEN 97 2.4.7 VREGEN — On Chip Voltage Regulator Enable Enables the internal 5V to 2.5V voltage regulator. If this pin is tied low, VDD1,2 and VDDPLL must be supplied externally ...

Page 71

... Freescale Semiconductor, Inc. Section 3 System Clock Description 3.1 Overview The Clock and Reset Generator provides the internal clock signals for the core and all peripheral modules. Figure 3-1 shows the clock connections from the CRG to all modules. Consult the CRG Block User Guide for details on clock generation. ...

Page 72

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 70 For More Information On This Product, Go to: www.freescale.com ...

Page 73

... Freescale Semiconductor, Inc. Section 4 Modes of Operation 4.1 Overview Eight possible modes determine the operating configuration of the MC9S12DT256. Each mode has an associated default memory map and external bus configuration controlled by a further pin. Three low power modes exist for the device. 4.2 Chip Configuration Summary The operating mode out of reset is determined by the states of the MODC, MODB, and MODA pins during reset (Table 4-1) ...

Page 74

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 Table 4-2 Clock Selection Based on PE7 PE7 = XCLKS 0 Table 4-3 Voltage Regulator VREGEN VREGEN 1 0 4.3 Security The device will make available a security feature preventing the unauthorized read and write of the memory contents. This feature allows: • ...

Page 75

... Freescale Semiconductor, Inc. 4.3.2.2 Executing from External Memory The user may wish to execute from external space with a secured microcontroller. This is accomplished by resetting directly into expanded mode. The internal FLASH and EEPROM will be disabled. BDM operations will be blocked. 4.3.3 Unsecuring the Microcontroller In order to unsecure the microcontroller, the internal FLASH and EEPROM must be erased ...

Page 76

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 4.4.4 Run Although this is not a low power mode, unused peripheral modules should not be enabled in order to save power. 74 For More Information On This Product, Go to: www.freescale.com ...

Page 77

... Freescale Semiconductor, Inc. Section 5 Resets and Interrupts 5.1 Overview Consult the Exception Processing section of the HCS12 Core User Guide for information on resets and interrupts. 5.2 Vectors 5.2.1 Vector Table Table 5-1 lists interrupt sources and vectors in default order of priority. Table 5-1 Interrupt Vector Locations ...

Page 78

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 $FFD0, $FFD1 $FFCE, $FFCF $FFCC, $FFCD $FFCA, $FFCB Modulus Down Counter underflow Pulse Accumulator B Overflow $FFC8, $FFC9 CRG PLL lock $FFC6, $FFC7 CRG Self Clock Mode $FFC4, $FFC5 $FFC2, $FFC3 ...

Page 79

... Freescale Semiconductor, Inc. 5.3 Effects of Reset When a reset occurs, MCU registers and control bits are changed to known start-up states. Refer to the respective module Block User Guides for register reset states. 5.3.1 I/O pins Refer to the HCS12 Core User Guides for mode dependent pin configuration of port and K out of reset ...

Page 80

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 78 For More Information On This Product, Go to: www.freescale.com ...

Page 81

... Freescale Semiconductor, Inc. Section 6 HCS12 Core Block Description 6.1 CPU12 Block Description Consult the CPU12 Reference Manual for information on the CPU. When the CPU12 Reference Manual refers to cycles this is equivalent to Bus Clock Periods. 6.2 HCS12 Module Mapping Control (MMC) Block Description Consult the MMC Block User Guide for information on the Module Mapping Control Block ...

Page 82

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 6.6 HCS12 Breakpoint (BKP) Block Description Consult the BKP Block guide for information on HCS12 breakpoint block Section 7 Clock and Reset Generator (CRG) Block Description Consult the CRG Block User Guide for information about the Clock and Reset Generator module. ...

Page 83

... Freescale Semiconductor, Inc. There are two Serial Communications Interfaces (SCI1 and SCI0) implemented on the MC9S12DT256 device. Consult the SCI Block User Guide for information about each Serial Communications Interface module. Section 12 Serial Peripheral Interface (SPI) Block Description There are three Serial Peripheral Interfaces(SPI2, SPI1 and SPI0) implemented on MC9S12DT256. ...

Page 84

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 Consult the EETS4K Block User Guide for information about the EEPROM module. Section 17 RAM Block Description This module supports single-cycle misaligned word accesses. Section 18 MSCAN Block Description There are three MSCAN modules (CAN4, CAN1 and CAN0) implemented on the MC9S12DT256. ...

Page 85

... Freescale Semiconductor, Inc. Component C10 / C P C11 / The PCB must be carefully laid out to ensure proper operation of the voltage regulator as well as of the MCU itself. The following rules must be observed: • Every supply pair must be decoupled by a ceramic capacitor connected as near as possible to the corresponding pins (C1 – ...

Page 86

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 Figure 20-1 Recommended PCB Layout for 112LQFP Colpitts Oscillator VDD1 C1 VSS1 84 For More Information On This Product, VSSA VSSX VSSR VDDR Q1 VSSPLL VDDPLL R1 Go to: www.freescale.com C3 VDDA VSS2 C2 VDD2 ...

Page 87

... Freescale Semiconductor, Inc. Figure 20-2 Recommended PCB Layout for 80QFP Colpitts Oscillator VDD1 C1 VSS1 VSSR VDDR For More Information On This Product, Go to: www.freescale.com MC9S12DT256 Device User Guide — V03.03 C3 VSSA VSSX Q1 VSSPLL VDDPLL R1 VDDA VSS2 C2 VDD2 85 ...

Page 88

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 Figure 20-3 Recommended PCB Layout for 112LQFP Pierce Oscillator VDD1 C1 VSS1 VDDPLL 86 For More Information On This Product, VSSA VSSX VSSR VSSPLL R3 VDDR to: www.freescale.com C3 VDDA VSS2 C2 VDD2 ...

Page 89

... Freescale Semiconductor, Inc. Figure 20-4 Recommended PCB Layout for 80QFP Pierce Oscillator VSSX VDD1 C1 VSS1 VSSR VDDR R1 For More Information On This Product, Go to: www.freescale.com MC9S12DT256 Device User Guide — V03.03 C3 VSSA VDDA VSS2 C2 VDD2 VSSPLL VSSPLL VDDPLL 87 ...

Page 90

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 88 For More Information On This Product, Go to: www.freescale.com ...

Page 91

... Freescale Semiconductor, Inc. Appendix A Electrical Characteristics A.1 General NOTE: The electrical characteristics given in this section are preliminary and should be used as a guide only. Values cannot be guaranteed by Motorola and are subject to change without notice. This supplement contains the most accurate electrical information for the MC9S12DT256 microcontroller available at the time of publication ...

Page 92

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 The VDDX, VSSX, VDDR and VSSR pairs supply the I/O pins, VDDR supplies also the internal voltage regulator. VDD1, VSS1, VDD2 and VSS2 are the supply pins for the digital logic, VDDPLL, VSSPLL supply the oscillator and the PLL ...

Page 93

... Freescale Semiconductor, Inc. A.1.4 Current Injection Power supply must maintain regulation within operating V operating maximum current conditions. If positive injection current (V injection current may flow out of VDD5 and could result in external power supply going out of regulation. Ensure external VDD5 load will shunt current greater than maximum injection current. This will be the greatest risk when the MCU is not consuming power ...

Page 94

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 2. The device contains an internal voltage regulator to generate the logic and PLL supply out of the I/O supply. The absolute maximum ratings apply when the device is powered from an external source. 3. All digital I/O pins are internally clamped ...

Page 95

... Freescale Semiconductor, Inc. A.1.7 Operating Conditions This chapter describes the operating conditions of the device. Unless otherwise noted those conditions apply to all the following data. NOTE: Please refer to the temperature rating of the device ( with regards to the ambient temperature T calculations refer to Section A.1.8 Power Dissipation and Thermal Characteristics ...

Page 96

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03. Junction Temperature Ambient Temperature Total Chip Power Dissipation, [ Package Thermal Resistance, [ C/W] JA The total power dissipation can be calculated from Chip Internal Power Dissipation, [W] INT Two cases with internal voltage regulator enabled and disabled must be considered: 1 ...

Page 97

... Freescale Semiconductor, Inc. Table A-5 Thermal Package Characteristics Num C Rating 1 T Thermal Resistance LQFP112, single sided PCB Thermal Resistance LQFP112, double sided PCB with 2 internal planes 3 T Thermal Resistance LQFP 80, single sided PCB Thermal Resistance LQFP 80, double sided PCB 4 T with 2 internal planes NOTES: 1 ...

Page 98

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 Conditions are shown in Table A-4 unless otherwise noted Num C Rating 1 P Input High Voltage T Input High Voltage 2 P Input Low Voltage T Input Low Voltage 3 C Input Hysteresis Input Leakage Current (pins in high impedance input ...

Page 99

... Freescale Semiconductor, Inc. A.1.10 Supply Currents This section describes the current consumption characteristics of the device as well as the conditions for the measurements. A.1.10.1 Measurement Conditions All measurements are without output loads. Unless otherwise noted the currents are measured in single chip mode, internal voltage regulator enabled and at 25MHz bus frequency using a 4MHz oscillator in Colpitts mode ...

Page 100

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 given. A very good estimate is to take the single chip currents and add the currents due to the external loads. Table A-7 Supply Current Characteristics Conditions are shown in Table A-4 unless otherwise noted Num C ...

Page 101

... Freescale Semiconductor, Inc. A.2 ATD Characteristics This section describes the characteristics of the analog to digital converter. A.2.1 ATD Operating Characteristics The Table A-8 shows conditions under which the ATD operates. The following constraints exist to obtain full-scale, full range results SSA DDA beyond the power supply levels that it ties to. If the input level goes outside of this range it will effectively be clipped ...

Page 102

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 specifies results in an error of less than 1/2 LSB (2.5mV) at the maximum leakage current. If device or operating conditions are less than worst case or leakage-induced error is acceptable, larger values of source resistance is allowed. A.2.2.2 Source Capacitance When sampling an additional internal capacitor is switched to the input ...

Page 103

... Freescale Semiconductor, Inc. A.2.3 ATD accuracy Table A-10 specifies the ATD conversion performance excluding any errors due to current injection, input capacitance and source resistance. Table A-10 ATD Conversion Performance Conditions are shown in Table A-4 unless otherwise noted 5.12V. Resulting to one 8 bit count = 20mV and one 10 bit count = 5mV ...

Page 104

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 DNL LSB V i-1 $3FF $3FE $3FD $3FC $3FB $3FA $3F9 $3F8 $3F7 $3F6 $3F5 $3F4 $3F3 Figure A-1 ATD Accuracy Definitions NOTE: Figure A-1 shows only definitions, for specification values refer to Table A-10 . ...

Page 105

... Freescale Semiconductor, Inc. A.3 NVM, Flash and EEPROM NOTE: Unless otherwise noted the abbreviation NVM (Non Volatile Memory) is used for both Flash and EEPROM. A.3.1 NVM timing The time base for all NVM program or erase operations is derived from the oscillator. A minimum oscillator frequency f is required for performing program or erase operations ...

Page 106

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide V03.03 A.3.1.3 Sector Erase Erasing a 512 byte Flash sector byte EEPROM sector takes: The setup time can be ignored for this operation. A.3.1.4 Mass Erase Erasing a NVM block takes: The setup time can be ignored for this operation. ...

Page 107

... Freescale Semiconductor, Inc. 3. Maximum Erase and Programming times are achieved under particular combinations of f Refer to formulae in Sections A.3.1.1 - A.3.1.4 for guidance. 4. Burst Programming operations are not applicable to EEPROM 5. Minimum Erase times are achieved under maximum NVM operating frequency f 6. Minimum time, if first word in the array is not blank 7 ...

Page 108

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide V03.03 106 For More Information On This Product, Go to: www.freescale.com ...

Page 109

... Freescale Semiconductor, Inc. A.4 Voltage Regulator The on-chip voltage regulator is intended to supply the internal logic and oscillator circuits. No external DC load is allowed. Table A-13 Voltage Regulator Recommended Load Capacitances Rating Load Capacitance on VDD1, 2 Load Capacitance on VDDPLL For More Information On This Product, MC9S12DT256 Device User Guide — V03.03 ...

Page 110

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 108 For More Information On This Product, Go to: www.freescale.com ...

Page 111

... Freescale Semiconductor, Inc. A.5 Reset, Oscillator and PLL This section summarizes the electrical characteristics of the various startup scenarios for Oscillator and Phase-Locked-Loop (PLL). A.5.1 Startup Table A-14 summarizes several startup characteristics explained in this section. Detailed description of the startup behavior can be found in the Clock and Reset Generator (CRG) Block Guide. ...

Page 112

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 A.5.1.5 Pseudo Stop and Wait Recovery The recovery from Pseudo STOP and Wait are essentially the same since the oscillator was not stopped in both modes. The controller can be woken up by internal or external interrupts. After t fetching the interrupt vector ...

Page 113

... Freescale Semiconductor, Inc. A.5.3 Phase Locked Loop The oscillator provides the reference clock for the PLL. The PLL´s Voltage Controlled Oscillator (VCO) is also the system clock source in self clock mode. A.5.3.1 XFC Component Selection This section describes the selection of the XFC components to achieve a good filter characteristics. ...

Page 114

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 The loop bandwidth f should be chosen to fulfill the Gardner’s stability criteria by at least a factor of 10, C typical values are 50. = 0.9 ensures a good transient response < ------------------------------------------ C And finally the frequency relationship is defined as f VCO ...

Page 115

... Freescale Semiconductor, Inc min1 t nom t max1 The relative deviation its maximum for one clock period, and decreases towards zero for larger nom number of clock periods (N). Defining the jitter as For N < 100, the following equation is a good fit for the maximum jitter: ...

Page 116

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 This is very important to notice with respect to timers, serial modules where a pre-scaler will eliminate the effect of the jitter to a large extent. Conditions are shown in Table A-4 unless otherwise noted Num C Rating 1 P Self Clock Mode frequency ...

Page 117

... Freescale Semiconductor, Inc. A.6 MSCAN Table A-17 MSCAN Wake-up Pulse Characteristics Conditions are shown in Table A-4 unless otherwise noted Num C Rating 1 P MSCAN Wake-up dominant pulse filtered 2 P MSCAN Wake-up dominant pulse pass For More Information On This Product, MC9S12DT256 Device User Guide — V03.03 ...

Page 118

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 116 For More Information On This Product, Go to: www.freescale.com ...

Page 119

... Freescale Semiconductor, Inc. A.7 SPI This section provides electrical parametrics and ratings for the SPI. In Table A-18 the measurement conditions are listed. Table A-18 Measurement Conditions Description Drive mode Load capacitance C LOAD, on all outputs Thresholds for delay measurement points A.7.1 Master Mode In Figure A-5 the timing diagram for master mode with transmission format CPHA=0 is depicted ...

Page 120

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03. (OUTPUT SCK (CPOL 0) (OUTPUT) 4 SCK (CPOL 1) (OUTPUT) 5 MISO MSB IN (INPUT) 9 MOSI PORT DATA MASTER MSB OUT (OUTPUT) 1.If configured as output 2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB. Figure A-6 SPI Master Timing (CPHA=1) In Table A-19 the timing characteristics for master mode are listed ...

Page 121

... Freescale Semiconductor, Inc. A.7.2 Slave Mode In Figure A-7 the timing diagram for slave mode with transmission format CPHA=0 is depicted. SS (INPUT) SCK (CPOL 0) (INPUT) 2 SCK (CPOL 1) 10 (INPUT) 7 MISO see SLAVE MSB (OUTPUT) note 5 6 MOSI MSB IN (INPUT) NOTE: Not defined! Figure A-7 SPI Slave Timing (CPHA=0) In Figure A-8 the timing diagram for slave mode with transmission format CPHA=1 is depicted ...

Page 122

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 SS (INPUT SCK (CPOL 0) (INPUT) 4 SCK (CPOL 1) (INPUT) 9 MISO see SLAVE note (OUTPUT MOSI MSB IN (INPUT) NOTE: Not defined! Figure A-8 SPI Slave Timing (CPHA=1) In Table A-20 the timing characteristics for slave mode are listed. ...

Page 123

... Freescale Semiconductor, Inc. A.8 External Bus Timing A timing diagram of the external multiplexed-bus is illustrated in Figure A-9 with the actual timing values shown on table Table A-21. All major bus signals are included in the diagram. While both a data write and data read cycle are shown, only one or the other would occur on a particular bus cycle. ...

Page 124

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 ECLK PE4 5 9 Addr/Data data (read) PA, PB Addr/Data data (write) PA Non-Multiplexed Addresses PK5:0 ECS PK7 24 R/W PE2 27 LSTRB PE3 30 NOACC PE7 33 IPIPO0 IPIPO1, PE6,5 Figure A-9 General External Bus Timing 122 For More Information On This Product, ...

Page 125

... Freescale Semiconductor, Inc. Table A-21 Expanded Bus Timing Characteristics Conditions are shown in Table A-4 unless otherwise noted, C Num C Rating 1 P Frequency of operation (E-clock Cycle time 3 D Pulse width, E low Pulse width, E high 5 D Address delay time D Address valid time to E rise (PW ...

Page 126

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 Table A-21 Expanded Bus Timing Characteristics Conditions are shown in Table A-4 unless otherwise noted, C Num C Rating 32 D NOACC hold time 33 D IPIPO[1:0] delay time D IPIPO[1:0] valid time to E rise ( IPIPO[1:0] delay time ...

Page 127

... Freescale Semiconductor, Inc. Appendix B Package Information B.1 General This section provides the physical dimensions of the MC9S12DT256 packages. For More Information On This Product, MC9S12DT256 Device User Guide — V03.03 Go to: www.freescale.com 125 ...

Page 128

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 B.2 112-pin LQFP package 0. PIN 1 112 IDENT 1 VIEW 0.050 C1 (Y) VIEW AB Figure B-1 112-pin LQFP mechanical dimensions (case no. 987) 126 For More Information On This Product, 0. TIPS VIEW AB 2 0.10 ...

Page 129

... Freescale Semiconductor, Inc. B.3 80-pin QFP package 0.05 A -C- H SEATING PLANE G DATUM -H- PLANE DETAIL C Figure B-2 80-pin QFP Mechanical Dimensions (case no. 841B) For More Information On This Product, MC9S12DT256 Device User Guide — V03. -B- B DETAIL - DETAIL C DATUM ...

Page 130

... Freescale Semiconductor, Inc. MC9S12DT256 Device User Guide — V03.03 128 For More Information On This Product, Go to: www.freescale.com ...

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