MB90F949A Fujitsu, MB90F949A Datasheet

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MB90F949A

Manufacturer Part Number
MB90F949A
Description
16-bit Proprietary Microcontroller
Manufacturer
Fujitsu
Datasheet

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MB90F949A
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FUJITSU SEMICONDUCTOR
16-bit Proprietary Microcontroller
CMOS
F
MB90F946A/947A/F947/F947A/F949/F949A/
V390HA/V390HB
* : Controller Area Network (CAN) - License of Robert Bosch GmbH
DESCRIPTION
The MB90945 series with one FULL-CAN* interface and FLASH ROM is especially designed for automotive HVAC
applications. Its main feature is the on board CAN* Interface, which conform to V2.0 Part A and Part B, while
supporting a very flexible message buffer scheme and so offering more functions than a normal FULL-CAN*
approach. With the new 0.35 µm CMOS technology, Fujitsu now offers on-chip FLASH-ROM program memory
up to 384 K bytes. An internal voltage booster removes the necessity for a second programming voltage.
An on board voltage regulator provides 3 V to the internal MCU core. This creates a major advantage in terms
of EMI and power consumption.
The internal PLL clock frequency multiplier provides an internal 42 ns instruction cycle time from an external
4 MHz clock.
The unit features a 4-channel Output Compare Unit and a 6-channel Input Capture Unit with two separate 16-bit
free running timers. Up to 3 UARTs, one Serial I/O and one I
purposes.
PACKAGE
2
DATA SHEET
MC-16LX MB90945 Series
100-pin Plastic QFP
(FPT-100P-M06)
2
C constitute additional functionality for communication
DS07-13741-2E

Related parts for MB90F949A

MB90F949A Summary of contents

Page 1

... FULL-CAN* approach. With the new 0.35 µm CMOS technology, Fujitsu now offers on-chip FLASH-ROM program memory up to 384 K bytes. An internal voltage booster removes the necessity for a second programming voltage. ...

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MB90945 Series FEATURES • 16-bit core CPU; 4 MHz external clock (24 MHz internal instr. cycle time) • New 0.35 µm CMOS Process Technology • Internal voltage regulator supports 3 V MCU core, offering low EMI and low ...

Page 3

... Supports internal clock synchronized transfer and external clock synchronized transfer Supports positive-edge and negative-edge clock synchronization Baud rate : 31.25 K/62.5 K/125 K/500 K/1 Mbps at System clock = 20 MHz (400 Kbps) MB90945 Series MB90F947, MB90F947A MB90F946A MB90F949, MB90F949A F 2 MC-16LX CPU multiplied by 6) Boot-block Flash memory Boot-block 256 Kbytes: MB90F949 ...

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... CAN Interface Supports multiple messages Flexible configuration of acceptance filtering : Full-bit compare/Full-bit mask/Two partial bit masks Supports Mbps MB90F947/F949/V390HA: Do not use clock modulation and CAN at the same time 4 MB90F947, MB90F947A MB90F946A MB90F949, MB90F949A machine clock frequencies) 1 channel (fsys = System clock frequency fsys fsys/2 5 ...

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... Reduces EMI by modulating the PLL clock 3 × 2 oscillation cycles (49.152 MHz oscillation) + oscilla- Start-up time at 16 power-on reset tion time of oscillator* MB90945 Series MB90F947, MB90F947A MB90F946A MB90F949, MB90F949A ⎯ ⎯ ⎯ ⎯ 3 address match registers All ports except P42, P43 P42, P43 ⎯ Phase modulation mode ...

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... Oscillation time of the oscillator is the time that the amplitude reaches 90 Embedded Algorithm is a trade mark of Advanced Micro Devices Inc Data is based on reliability tests during process qualification (the value for T the Arrenhius formula from data of accelerated measurements at elevated temperature MB90F947, MB90F947A MB90F946A MB90F949, MB90F949A Supports automatic programming, Embedded Algorithm Write/Erase/Erase-Suspend/Resume com- ...

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PIN ASSIGNMENTS • MB90947A/F946A/F947/F947A/F949/F949A P24/INT4 1 P25/INT5 2 P26/INT6 3 P27/INT7 4 P30 5 P31 6 P32 7 P33 8 P34/SOT0 9 P35/SCK0 10 P36/SIN0 11 P37 12 P44 13 P45/ADTG 14 Vcc 15 Vss P40 18 ...

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MB90945 Series • MB90V390HA/V390HB P24/INT4 1 P25/INT5 2 P26/INT6 3 P27/INT7 4 P30/RX0 5 P31/TX0 6 P32/TIN1 7 P33/TOT1 8 P34/SOT0 9 P35/SCK0 10 P36/SIN0 11 P37/SIN1 12 P44 13 P45/ADTG 14 Vcc 15 Vss P40/SCK1 18 ...

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PIN DESCRIPTION Pin no. Pin name Circuit type RST B P00 to P05 IN0 to IN5 P06, P07 P10, P11 OUT0 to OUT3 87, 88 P12, ...

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MB90945 Series Pin no. Pin name P43 21 SCL P46, P47 22, 23 INT0, INT1 P50 24 PPG10 PB0 to PB3 PPG02 to PPG05 AN8 to AN11 PB4 29 SIN4 AN12 PB5 30 SCK4 AN13 PB6 31 ...

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Pin no. Pin name Circuit type P95 60 SOT3 P94 61 SCK3 P91 62 SCK2 P92 63 SOT2 64 P96 PA0 to PA7 75, 76 P80, P81 AVRH 34 AVRL 35 AVss ...

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MB90945 Series I/O CIRCUIT TYPE Type X1 Pch Nch X0 A Standby control signal (pull-up Circuit Clock input CMOS Hysteresis R CMOS Hysteresis Pch Nch Automotive Hysteresis Remarks • ...

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Type Pch Nch (pull-down Circuit • CMOS output (4 mA) • Automotive Hysteresis input Pch • Analog input Nch Analog input Automotive Hysteresis • ...

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MB90945 Series HANDLING DEVICES Special care is required for the following when handling the device : • Preventing latch-up • Stabilization of supply voltage • Treatment of unused pins • Using external clock • Power supply pins ( ...

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Power supply pins ( • If there are multiple V and are connected the inside of the device to prevent such malfunctioning as latch up. To reduce unnecessary radiation, prevent malfunctioning of ...

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MB90945 Series BLOCK DIAGRAMS • MB90F946A Clock X0, X1 Controller with Phase RST Modulator RAM 16 K bytes Flash 384 K bytes Prescaler SOT0 UART0 SCK0 SIN0 Prescaler x2 SOT2/3 UART2/3 (LIN/SCI/ SCK2/3 SPI) SIN2/3 Prescaler SOT4 Serial I/O SCK4 ...

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MB90947A Clock X0, X1 Controller with Phase RST Modulator RAM 6 K bytes ROM 128 K bytes Prescaler SOT0 UART0 SCK0 SIN0 Prescaler SOT3 UART3 (LIN/SCI/ SCK3 SPI) SIN3 Prescaler SOT4 Serial I/O SCK4 SIN4 ...

Page 18

MB90945 Series • MB90F947, MB90F947A Clock X0, X1 Controller with Phase RST Modulator RAM 6 K bytes Flash 128 K bytes Prescaler SOT0 UART0 SCK0 SIN0 Prescaler SOT3 UART3 (LIN/SCI/ SCK3 SPI) SIN3 Prescaler SOT4 Serial I/O SCK4 SIN4 AV ...

Page 19

... MB90F949, MB90F949A Clock X0, X1 Controller with Phase RST Modulator RAM 12 K bytes Flash 256 K bytes Prescaler SOT0 UART0 SCK0 SIN0 Prescaler SOT3 UART3 (LIN/SCI/ SCK3 SPI) SIN3 Prescaler SOT4 Serial I/O SCK4 SIN4 10-bit A/D AN14 to AN0 Converter 15 input AVRH ...

Page 20

... For example, an attempt to access 00C000 The ROM area in bank FF exceeds 32/48 K bytes, and its entire image cannot be shown in bank 00. The image between FF4000 and FF3FFF /FF7FFF is visible only in bank FF MB90947A MB90F949 MB90F947 MB90F949A MB90F947A FFFFFF H H ROM (FF bank) ROM (FF bank) FF0000 H H FEFFFF H ...

Page 21

I/O MAP Address Register 00 Port 0 data register H 01 Port 1 data register H 02 Port 2 data register H 03 Port 3 data register H 04 Port 4 data register H 05 Port 5 data register H ...

Page 22

MB90945 Series Address Register 20 Serial Mode Control Status Input/Output Data Rate and Data Serial Mode Control Serial Mode Control ...

Page 23

Address Register 48 PPG8 operation mode control register H 49 PPG9 operation mode control register H 4A PPG8 and PPG9 clock select register PPGA operation mode control register H 4D PPGB operation mode control register H ...

Page 24

MB90945 Series Address Register Flash Control Status AE H (Flash devices only. Otherwise reserved Interrupt control register Interrupt control register Interrupt control register Interrupt control register 03 H ...

Page 25

Address Register 3500 Reload L H 3501 Reload H H 3502 Reload L H 3503 Reload H H 3504 Reload L H 3505 Reload H H 3506 Reload L H 3507 Reload H H 3508 Reload L H 3509 Reload ...

Page 26

MB90945 Series Address Register 3520 Input Capture 0 H 3521 Input Capture 0 H 3522 Input Capture 1 H 3523 Input Capture 1 H 3524 Input Capture 2 H 3525 Input Capture 2 H 3526 Input Capture 3 H 3527 ...

Page 27

Address Register 356E CAN Direct Mode Register H 356F to H 359F H 2 35A0 I C bus status register H 35A1 bus control register H 35A2 ten bit slave address register 35A3 ...

Page 28

MB90945 Series Address Register 35E0 ROM Correction Address 0 H 35E1 ROM Correction Address 0 H 35E2 ROM Correction Address 0 H 35E3 ROM Correction Address 1 H 35E4 ROM Correction Address 1 H 35E5 ROM Correction Address 1 H ...

Page 29

CAN CONTROLLER The CAN controller has the following features : • Conforms to CAN Specification Version 2.0 Part A and B - Supports transmission/reception in standard frame and extended frame formats • Supports transmitting of data frames by receiving remote ...

Page 30

MB90945 Series Address Register CAN1 003900 H Control status register 003901 H 003902 H Last event indicator register 003903 H 003904 Receive/transmit H error counter 003905 H 003906 Bit timing H register 003907 H 003908 H IDE register 003909 H ...

Page 31

List of Message Buffers (ID Registers) (1) Address Register CAN1 003800 H General- to purpose RAM 00381F H 003820 H 003821 H ID register 0 003822 H 003823 H 003824 H 003825 H ID register 1 003826 H 003827 H ...

Page 32

MB90945 Series Address Register CAN1 003840 H 003841 H ID register 8 003842 H 003843 H 003844 H 003845 H ID register 9 003846 H 003847 H 003848 H 003849 H ID register 10 00384A H 00384B H 00384C H ...

Page 33

List of Message Buffers (DLC Registers and Data Registers) (1) Address Register CAN1 003860 H DLC register 0 003861 H 003862 H DLC register 1 003863 H 003864 H DLC register 2 003865 H 003866 H DLC register 3 003867 ...

Page 34

MB90945 Series List of Message Buffers (DLC Registers and Data Registers) (2) Address Register CAN1 003880 H to Data register 0 (8 bytes) 003887 H 003888 H to Data register 1 (8 bytes) 00388F H 003890 H to Data register ...

Page 35

List of Message Buffers (DLC Registers and Data Registers) (3) Address Register CAN1 0038F0 H to Data register 14 (8 bytes) 0038F7 H 0038F8 H to Data register 15 (8 bytes) 0038FF H MB90945 Series Abbreviation Access DTR14 R/W DTR15 ...

Page 36

MB90945 Series INTERRUPT FACTORS, INTERRUPT VECTORS, INTERRUPT CONTROL REGISTER Interrupt cause Reset INT9 instruction Exception Timebase timer External Interrupt INT0 to INT7 Reserved Reserved CAN 1 RX CAN 1 TX/NS PPG 0/1 PPG 2/3 PPG 4/5 PPG 6/7 PPG 8/9 ...

Page 37

Interrupt cause UART UART 3 RX UART UART 3 TX Flash memory Delayed interrupt : The interrupt request flag is cleared by the EI : The interrupt request flag is cleared by the ...

Page 38

MB90945 Series ELECTRICAL CHARACTERISTICS 1. Absolute Maximum Ratings Parameter Power supply voltage* 1 Input voltage* 1 Output voltage* 1 Maximum Clamp Current Total Maximum Clamp Current “L” level maximum output current “L” level average output current “L” level maximum overall ...

Page 39

Note that signal is input when the microcontroller power supply is off (not fixed the power supply is provided from the pins, so that incomplete operation may result. • Note that if ...

Page 40

... No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. 40 Value Unit ...

Page 41

DC Characteristics Sym- Parameter Pin bol ⎯ V IHA Input “H” ⎯ V IHS voltage ⎯ V IHR ⎯ V IHM ⎯ V ILA Input “L” ⎯ V ILS voltage ⎯ V ILR ⎯ V ILM Output “H” Normal ...

Page 42

MB90945 Series (Continued) Sym- Parameter Pin bol Pull-down R MD2 DOWN resistance I CC Power supply V CC current* I CCS I CTS I CTSPLL6 I CCH Other than Input capacity C AVRH, IN AVRL, ...

Page 43

AC Characteristics (1) Clock Timing Sym- Parameter Pin bol Min Typ X0 Clock f C frequency X0, X1 125 Clock t CYL X0, X1 83.33 ...

Page 44

MB90945 Series • Guaranteed PLL operation range 5.5 4.5 3.5 1.5 Guaranteed operation range of MB90F947/MB90F949 • CS2 (bit 0 in PSCCR register 1.5 • CS2 (bit 0 in PSCCR register) = ...

Page 45

Reset Standby Input Parameter Symbol Pin Reset input t RST RSTL time *1 : “t ” represents one cycle time of the machine clock reset can fully initialize the Flash memory performing the automatic ...

Page 46

MB90945 Series (3) Power On Reset Parameter Symbol Power on rise time t R Power off time t OFF you change the power supply voltage too rapidly, a power on reset may occur. We recommend ...

Page 47

UART0, SIO Timing Sym- Parameter bol Serial clock cycle time t SCYC SCK ↓ → SOT delay time t SLOV Valid SIN → SCK ↑ t IVSH SCK ↑ → Valid SIN hold time t SHIX Serial clock “H” ...

Page 48

MB90945 Series • Internal Shift Clock Mode SCK SOT SIN • External Shift Clock Mode SCK SOT SIN 48 t SCYC 2 SLOV 2 IVSH SHIX ...

Page 49

UART2/3 Timing • Bit setting : ESCR : SCES = 0, ECCR : SCDE = 0 Sym- Parameter bol Serial clock cycle time t SCYC SCK ↓ → SOT delay time t SLOVI Valid SIN → SCK ↑ t ...

Page 50

MB90945 Series • External Shift Clock Mode SCK SOT SIN • Bit setting : ESCR : SCES = 1, ECCR : SCDE = 0 Parameter Serial clock cycle time SCK ↑ → SOT delay time Valid SIN → SCK ↓ ...

Page 51

Internal Shift Clock Mode 2.4 V SCK SOT SIN • External Shift Clock Mode SCK t R SOT SIN MB90945 Series t SCYC 0 SHOVI 2 IVSLI SLIXI ...

Page 52

MB90945 Series • Bit setting : ESCR : SCES = 0, ECCR : SCDE = 1 Sym- Parameter Serial clock cycle time SCK ↑ → SOT delay time Valid SIN → SCK ↓ SCK ↓ → Valid SIN hold time ...

Page 53

Bit setting : ESCR : SCES = 1, ECCR : SCDE = 1 Sym- Parameter bol Serial clock cycle time t SCYC SCK ↓ → SOT delay time t SLOVI Valid SIN → SCK ↑ t IVSHI SCK ↑ ...

Page 54

MB90945 Series (6) Trigger Input Timing Parameter Symbol t TRGH Input pulse width t TRGL Note : t is the machine clock cycle time (Unit : ns) . Refer to “ (1) Clock timing” rating for t CP • Trigger ...

Page 55

Timing Parameter SCL clock frequency Hold time (repeated) START condition SDA ↓ → SCL ↓ “L” width of SCL clock “H” width of SCL clock Set-up time for a repeated START condition SCL ↑ → SDA ...

Page 56

MB90945 Series 5. A/D Converter = −40 °C to +105 °C, 3.0 V ≤ AVRH − AVRL Parameter Symbol ⎯ Resolution ⎯ Total error ⎯ Nonlinearity error Differential ⎯ nonlinearity error AN0 to AN14 AVRL − 1.5 ...

Page 57

Definition of A/D Converter Terms Resolution : Analog variation that is recognized by an A/D converter. : Deviation between a line across zero-transition line ( “00 0000 0000” ← → “00 0000 0001” ) Linear error and full-scale transition ...

Page 58

MB90945 Series (Continued) Linear error 3FF H Actual conversion characteristics 3FE H {1 LSB × (N − 3FD H 004 H 003 H 002 H Ideal characteristics 001 H V (actual measurement OT AVRL Analog ...

Page 59

Notes on A/D Converter Section • About the external impedance of the analog input and its sampling time • A/D converter with sample and hold circuit. If the external impedance is too high to keep sufficient sampling time, the ...

Page 60

MB90945 Series 8. Flash Memory Program/Erase Characteristics Parameter Conditions Sector erase time = +25 ° Chip erase time = 5 Word (16-bit width) programming time ⎯ Program/Erase cycle Flash Data Retention Average = +85 °C ...

Page 61

EXAMPLE CHARACTERISTICS •MB90F947 +25 ˚C, at external clock operating Internal operation frequency 2.0 3.0 4.0 5 CTS ...

Page 62

MB90945 Series (Continued CCH CC = +25 ˚C, at stop 2.0 3.0 4.0 5.0 6.0 V [V] CC 7.0 ...

Page 63

+25 ˚C, at external clock operating Internal operation frequency 2.0 3.0 4.0 5 CTS CC = ...

Page 64

MB90945 Series (Continued CCH CC = +25 ˚C, at stop 2.0 3.0 4.0 5.0 6.0 V [V] CC 7.0 ...

Page 65

Characteristic −V ) − 900 800 700 600 500 400 300 200 100 (mA) OH − V Automotive V IN 5.0 4.5 4.0 3.5 ...

Page 66

... Plastic QFP because MB90F947 does not support (FPT-100P-M06) clock modulation and CAN at the same time 100-pin Plastic QFP (FPT-100P-M06 recommended to use MB90F949A, 100-pin Plastic QFP because MB90F949 does not support (FPT-100P-M06) clock modulation and CAN at the same time 100-pin Plastic QFP ...

Page 67

... INDEX 100 1 0.65(.026) 0.32±0.05 (.013±.002) "A" 2002 FUJITSU LIMITED F100008S-c-5-5 C MB90945 Series Note These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder ...

Page 68

... Fujitsu or any third party or does Fujitsu warrant non-infringement of any third-party’s intellectual property right or other right by using such information. ...

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