MT9041BP Zarlink Semiconductor, MT9041BP Datasheet
MT9041BP
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MT9041BP Summary of contents
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... France Brevete S.G.D.G. 0772912; Germany DBP No. 69502724.7-08 Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2003, Zarlink Semiconductor Inc. All Rights Reserved. T1/E1 System Synchronizer MT9041BP Description The MT9041B T1/E1 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links ...
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... Clock 4.096MHz (CMOS Output). This output is used for ST-BUS operation at 2.048Mb/s and 4.096Mb/s. MT9041B VDD 5 25 IC0 OSCo 6 24 IC0 OSCi F16o MT9041B 22 IC0 8 F0o 21 9 IC0 F8o 10 20 IC1 C1.5o IC0 Figure 2 - Pin Connections Description nominal Zarlink Semiconductor Inc. Data Sheet ...
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... A reset (RST) must be performed after every frequency select input change. Operation with FS1 and FS2 both at logic low is reserved and must not be used. See Table 1. FS2 MT9041B Description nominal. DC FS1 Input Frequency 0 0 Reserved 0 1 8kHz 1 0 1.544MHz 1 1 2.048MHz Table 1 - Input Frequency Selection 3 Zarlink Semiconductor Inc. Data Sheet ...
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... The T1 Divider Circuit uses the 12.384MHz signal to generate two clock outputs. C1.5o and C3o are generated by dividing the internal C12 clock by four and eight respectively. These outputs have a nominal 50% duty cycle. MT9041B Digitally Limiter Loop Filter Controlled Oscillator Control Circuit Figure 3 - DPLL Block Diagram 4 Zarlink Semiconductor Inc. Data Sheet DPLL Reference to Output Interface Circuit ...
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... As shown in Table 2, pin MS selects between NORMAL and FREERUN modes MT9041B C1.5o T1 Divider 12MHz Tapped Delay Line C2o E1 Divider C4o C8o 16MHz Tapped C16o Delay F0o Line F8o F16o Description of Operation NORMAL FREERUN Table 2 - Operating Modes 5 Zarlink Semiconductor Inc. Data Sheet C3o ...
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... However, the data sheet section on AC Electrical Characteristics - Jitter Transfer specifies transfer values for only three cases, 8kHz to 8kHz, 1.544MHz to 1.544MHz and 2.048MHz to 2.048MHz. Since all outputs are derived from the same signal, these transfer values apply to all outputs. MT9041B 6 Zarlink Semiconductor Inc. Data Sheet ...
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... The given signal is typically the output signal. The ideal signal is of constant frequency and is nominally equal to the value of the final output signal or final input signal. MT9041B – A ------ 20 × InputT – 18 -------- - 20 × 2.5UI 1UIT × ---------------------- = OutputT ( ) 1 1UIE ( ) 644ns × ------------------- = OutputT = 3.3UI 488ns 7 Zarlink Semiconductor Inc. Data Sheet ) 1 ...
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... ITU-T I.431 March 1993 Applications This section contains MT9041B application specific details for clock and crystal operation, reset operation and power supply decoupling. Master Clock The MT9041B can use either a clock or crystal as the master timing source. MT9041B 8 Zarlink Semiconductor Inc. Data Sheet ...
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... The output clock should be connected directly (not AC coupled) to the OSCi input of the MT9041B, and the OSCo output should be left open as shown in Figure 5. MT9041B MT9041B +5V OSCi +5V 20MHz OUT GND OSCo No Connection Figure 5 - Clock Oscillator Circuit 9 Zarlink Semiconductor Inc. Data Sheet 0.1uF ...
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... Maximum Series Resistance: 35 Approximate Drive Level: 1mW e.g., CTS R1027-2BB-20.0MHZ ± ± ( 20ppm absolute, 6ppm 0C to 50C, 32pF, 25 MT9041B OSCi 20MHz 1MΩ 56pF 39pF 3-50pF OSCo 100Ω 1uH Figure 6 - Crystal Oscillator Circuit Ω Zarlink Semiconductor Inc. Data Sheet ...
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... The MT9041B has two VDD (+5V) pins and two VSS (GND) pins. Power and decoupling capacitors should be included as shown in Figure 8. MT9041B MT9041B +5V R 10kΩ RST R P 1kΩ 10nF Figure 7 - Power-Up Reset Circuit C1 0.1uF 18 15 MT9041B 0.1uF Figure 8 - Power Supply Decoupling 11 Zarlink Semiconductor Inc. Data Sheet is for protection P C ...
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... MT9041B MT9041B F0o C4o REF OUT IN0 RST IN1 IN2 1kΩ IN3 IN4 10kΩ IN5 IN6 IN7 10nF MUX To Controller Interrupt 12 Zarlink Semiconductor Inc. Data Sheet CLOCK 20MHz OSCi Out ± 20MHz 32ppm + 5V FS1 FS2 ...
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... V 0 0.7V CIH DD V 0.3V CIL V 2.3 SIH V 0.8 SIL V 0.4 HYS I - Zarlink Semiconductor Inc. Data Sheet ) unless otherwise stated. Min Max Units -0.3 7.0 -0 -55 125 900 mW Typ Max Units 5.0 5.5 V ° unless otherwise stated. SS Units ...
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... Sym Schmitt 0.8 LM Timing Reference Points t 14 Zarlink Semiconductor Inc. Data Sheet Units Conditions/Notes† ppm 2-5 ppm 2-5 ppm 2-5 ppm 1,3-5,37 ppm 1,3-5, 37 ppm 1,3-5, 3- 3-11 us/s 1-11, 24 ...
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... R15D t R2D t F0D t F16S t F16H t C15D t C3D t C2D t C4D t C8D t C16D t C15W t C3W t C2W t C4W t C8W t C16WL t F0WL t F8WH t F16WL t ORF Zarlink Semiconductor Inc. Data Sheet Min Max Units 100 - 337 363 ns 222 238 ns 110 134 -51 -37 ns -51 - 309 339 ...
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... F0o F16o t C16WL C16o t C8W C8o t C4W C4o C2o C3o C1.5o MT9041B R15D R2D F0WL t F16S t C8W t C4W t C2W t t C3W C3W t C15W Figure 12 - Output Timing 1 16 Zarlink Semiconductor Inc. Data Sheet t R8D F8WH F0D F16WL F16H t C16D C8D C4D C2D ...
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... UIpp 0.160 UIpp 0.320 UIpp Sym Min Max 0.015 0.010 0.010 0.005 Sym Min Max 0.015 0.010 0.010 0.005 17 Zarlink Semiconductor Inc. Data Sheet Conditions/Notes† 1-11,18-21,25 1-11,18-21,25 1-11,18-21,25 1-11,18-21,26 1-11,18-21,27 1-11,18-21,28 1-11,18-21,29 1-11,18-21,30 1-11,18-21,33 Units Conditions/Notes† UIpp 1-11,18-21,26 UIpp ...
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... Jitter attenuation for 100kHz@0.3UIpp input † See "Notes" following AC Electrical Characteristics tables. MT9041B Sym Min Max Units Sym Min Max Units Zarlink Semiconductor Inc. Data Sheet Conditions/Notes† 1,3,6-11,18-19,21,25,32 1,3,6-11,18-19,21,25,32 1,3,6-11,18-19,21,25,32 1,3,6-11,18-19,21,25,32 1,3,6-11,18-19,21,25,32 1,3,6-11,18-19,21,25,32 Conditions/Notes† 1,4,6-11,18-19,21,26,32 1,4,6-11,18-19,21,26,32 1,4,6-11,18-19,21,26,32 1,4,6-11,18-19,21,26,32 1,4,6-11,18-19,21,26,32 1,4,6-11,18-19,21,26,32 1,4,6-11,18-19,21,26,32 ...
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... UIpp 1,3,6-11,18-19,21-23,25 0.15 UIpp 1,3,6-11,18-19,21-23,25 0.08 UIpp 1,3,6-11,18-19,21-23,25 0.02 UIpp 1,3,6-11,18-19,21-23,25 0.01 UIpp 1,3,6-11,18-19,21-23,25 19 Zarlink Semiconductor Inc. Data Sheet Conditions/Notes† 1,5,6-11,18-19,21,27,32 1-5,6-11,18-19, 21,27,33 1,5,6-11,18-19,21,27,32 1-5,6-11,18-19,21,2733 1,5,6-11,18-19,21,27,32 1-5,6-11,18-19, 21,27,33 1,5,6-11,18-19,21,27,32 1-5,6-11,18-19, 21,27,33 1,5,6-11,18-19,21,27,32 1-5,6-11,18-19, 21,27,33 1,5,6-11,18-19,21,27,32 1-5,6-11,18-19,21,27,33 1,5,6-11,18-19,21,27,32 1-5,6-11,18-19,21,27,33 ...
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... UIpp 1 UIpp 1 UIpp Sym Min Typ Max - -32 0 +32 -100 0 +100 Zarlink Semiconductor Inc. Data Sheet Conditions/Notes† 1,4,6-11,18-19,21-23,26 1,4,6-11,18-19,21-23,26 1,4,6-11,18-19,21-23,26 1,4,6-11,18-19,21-23,26 1,4,6-11,18-19,21-23,26 1,4,6-11,18-19,21-23,26 1,4,6-11,18-19,21-23,26 1,4,6-11,18-19,21-23,26 1,4,6-11,18-19,21-23,26 Conditions/Notes† 1,5,6-11,18-19,21-23,27 1,5,6-11,18-19,21-23,27 1,5,6-11,18-19,21-23,27 1,5,6-11,18-19,21-23,27 1,5,6-11,18-19,21-23,27 1,5,6-11,18-19,21-23,27 1,5,6-11,18-19,21-23,27 1,5,6-11,18-19,21-23,27 1,5,6-11,18-19,21-23,27 Units Conditions/Notes† ppm ...
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... No filter. 33. 40Hz to 100kHz bandpass filter. 34. With respect to reference input signal frequency. 35. After a RST or TRST. 36. Master clock duty cycle 40% to 60%. MT9041B 21 Zarlink Semiconductor Inc. Data Sheet ...
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