HDMP-0482 Agilent Technologies, Inc., HDMP-0482 Datasheet
HDMP-0482
Specifications of HDMP-0482
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HDMP-0482 Summary of contents
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... CAUTION: As with all semiconductor ICs advised that normal static precautions be taken in the handling and assembly of this component to prevent damage and/or degradation which may be induced by electrostatic discharge (ESD). Agilent HDMP-0482 Octal Cell Port Bypass Circuit with CDR and Data Valid Detection Data Sheet Features • ...
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... FM_NODE[0]_DV MODE_VDD BYPASS0 Figure 1. Block Diagram of HDMP-0482. HDMP-0482 Block Diagram CDR CDR DV FSEL REFCLK RFCM DV Output MODE_VDD BYPASS0 ...
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AV Output 3 BLL Output EQU Input BYPASS[N]- Input REFCLK Input RFCM Input MODE_VDD Input ...
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... FM_NODE[0]_DV BYPASS0 Figure 2. Block Diagram of HDMP-0482, MODE_VDD is HIGH FM_NODE[0]_DV Figure 3. Block Diagram of HDMP-0482, MODE_VDD is LOW CDR CDR ...
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... FM_NODE[7]_AV 14 FM_NODE[0]- 15 FM_NODE[0 Figure 4. HDMP-0482 Package Layout and Marking, Top View. nnnn-nnn = wafer lot - build number; Rz.zz = Die Revision Supplier Code; YYWW = Date Code (YY = year work week); COUNTRY = country of manufacture (on back side). Table 2. I/O Type Definitions. I/O Type Definition I-LVTTL LVTTL Input ...
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... Table 3. Pin Definitions for HDMP-0482. Pin Name Pin Pin Type TO_NODE[0]+ 20 HS_OUT TO_NODE[0]- 19 TO_NODE[1]+ 23 TO_NODE[1]- 22 TO_NODE[2]+ 32 TO_NODE[2]- 31 TO_NODE[3]+ 35 TO_NODE[3]- 34 TO_NODE[4]+ 44 TO_NODE[4]- 43 TO_NODE[5]+ 47 TO_NODE[5]- 46 TO_NODE[6]+ 57 TO_NODE[6]- 56 TO_NODE[7]+ 60 TO_NODE[7]- 59 FM_NODE[0]+ 16 HS_IN FM_NODE[0]- 15 FM_NODE[1]+ 26 FM_NODE[1]- 25 FM_NODE[2]+ 29 FM_NODE[2]- 28 FM_NODE[3]+ 38 FM_NODE[3]- 37 FM_NODE[4]+ 41 FM_NODE[4]- 40 FM_NODE[5]+ 51 FM_NODE[5]- 50 FM_NODE[6]+ ...
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... Table 3, continued. Pin Definitions for HDMP-0482. Pin Name Pin Pin Type GND VCCA 8 S VCCHS[0, VCCHS[2, VCCHS[ VCCHS[ VCCHS[6, VCC HDMP-0482 Absolute Maximum Ratings Symbol Parameters V Supply Voltage CC V LVTTL Input Voltage IN, LVTTL V HS_IN Input Voltage IN, HS_IN I LVTTL Output Voltage O, LVTTL ...
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... HS_OUT Output Pk-Pk Diff. Voltage Range ( Fig. 9) OP,HS_OUT HDMP-0482 Power Dissipation + Symbol Parameter P Power Dissipation D HDMP-0482 Output Jitter Characteristics, T Symbol Parameter RJ Random Jitter at TO_NODE pins (1 sigma rms) DJ Deterministic Jitter at TO_NODE pins (pk-pk) Please refer to Figures 6 and 7 for jitter measurement setup information. HDMP-0482 Locking Characteristics, T Parameter ...
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... MHz Figure 7. Setup for Measurement of Deterministic Jitter. 9 HDMP-0482 BYPASS[0]- +/- FM_NODE[0] BYPASS[1:4]- REFCLK +/- TO_NODE[0] 1.4V 2 106.25 MHz Ch 1/2 HP 83480A Digital Trigger Communication Analyzer HDMP-0482 BYPASS[0]- +/- FM_NODE[0] BYPASS[1:4]- REFCLK +/- TO_NODE[0] 1.4V 2 106.25 MHz Ch 1/2 HP 83480A Digital Trigger Communication 53.125 MHz Analyzer N N/C ...
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O-LVTTL Vcc ESD Protection GND Figure 8. O_LVTTL and I_LVTTL Simplified Circuit Schematic. HS_OUT 75 Ohms TO_NODE[n]+ TO_NODE[n]- GND ESD Protection Figure 9. HS_OUT and HS_IN Simplified Circuit Schematic. Note: FM_NODE[n] inputs should never be connected to ground as permanent ...
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... MIN. All dimensions shown in mm Figure 10. HDMP-0482 Package Drawing 3.15V to 3.45V C CC Unit Typ. Max. C/W 9.5 — for these devices is 39.4 C/W for the HDMP-0482 where the power being D Details Plastic 85% Tin, 15% Lead 300 – 800 micro-inches ...
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... VCC 5 6 GND 7 VCC 8 GND 9 CPLL1 10 CPLL0 Figure 11. Recommended Power Supply Filtering. Capacitors = 0.1 F, Resistor = 10 . www.semiconductor.agilent.com Data subject to change. Copyright © 2001 Agilent Technologies, Inc. October 24, 2001 5988-4185EN HDMP-0482 VCC VCC GND VCC 33 ...