BU9729K Rohm, BU9729K Datasheet
BU9729K
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BU9729K Summary of contents
Page 1
... Standard ICs Segment-type LCD driver BU9729K The BU9729K is a driver for segmented liquid crystal displays, which enables connection with a microcomputer through a serial interface. 4-bit common output and an internal power supply circuit for LCD drive make it possible to configure a low-cost display system. • ...
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... Standard ICs • Pin assignments SEG11 25 SEG12 26 SEG13 27 SEG14 28 SEG15 29 SEG16 30 SEG17 31 SEG18 Fig.1 BU9729K SEG2 15 SEG1 14 COM4 13 COM3 12 COM2 COM1 ...
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... Reduced by – 4.0mW for each increase over 25 C. Function pin must be satisfied. LCD C SS pin. DD “ ” display data is not displayed, and when = 0V) SS Limits Unit – – 400 mW – – 125 C – – BU9729K “ ” the data is displayed. 3 ...
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... SCK used as reference — — rise used as reference — — ns 8th fall of SCK used as reference BU9729K Conditions — The condition must be satisfied. LCD 470k f Conditions Applicable pin OSC1, SD, SCK — — — = 0.1V ...
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... Standard ICs • Input / output circuits Pin name Equivalent circuit SD I SCK GND OSC1 I OSC2 O OSC1 OSC2 Pin name SEG1 O ~ SEG18 DD COM1 ~ COM4 V DD GND BU9729K Equivalent circuit V LCD OUT V LCD GND 5 ...
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... SCK HIGH at the rise of the 8 command, and LOW, the serial data is recognized as display data. Serial data is input sequentially, starting from the MSB WL2 t WH1 t t TLH1 THL SU3 Fig. 2 Interface timing Fig. 3 Command cycle nth clock of SCK, the serial data is recognized as a BU9729K t WH2 CCH ...
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... The display begins, in accordance with the contents of the DDRAM. (5) Display Data RAM (DDRAM) Write MSB The binary 4-bit data DDDD is written to the DDRAM. The address is that specified by the Address Set command. After this command is executed, the address is automat- ically incremented nth clock of SCK) are available for the BU9729K ...
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... Description of functions (1) Register The BU9729K has an 8-bit command / data register. Serial data is read in 8-clock units of SCK. If the data read into the register is displayed data ( LOW at the eighth clock of SCK written to the DDRAM command data ( HIGH at the eighth clock of SCK output to the command decoder to control the BU9729K ...
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... OSC1 Rf (Rf can be used to change the OSC2 frequency.) Fig oscillator circuit MSB MSB Specified address Specified address + 1 bit0) (bit3 Display data (bit3 BU9729K LSB 0 LSB LSB D1 D0 bit0) LSB D1 D0 bit0) EXIT CLOCK INPUT OSC1 OSC2 OPEN Fig. 5 External clock input 9 ...
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... Standard ICs (5) LCD driver power supply The LCD driver power supply is generated by the BU9729K. V (6) LCD drive circuit The LCD drive circuit is configured of 4 common drivers and 18 segment drivers. When oscillation begins, any effec- tive common output automatically outputs a selective waveform, while the others output non-selective waveforms. ...
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... COM1 COM2 COM3 COM4 0 (No SEGn corresponding from COM1 to COM4 are displayed.) 1 (Only SEGn corresponding to COM1 are displayed.) 0 (Only SEGn corresponding to COM2 are displayed.) 0 (Only SEGn corresponding to COM2 and COM4 are displayed.) 1 (All SEGn corresponding from COM1 to COM4 are displayed.) Fig. 7 BU9729K ...
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... Standard ICs V has to satisfy the following conditions. DD Instruction receipt possible V 2. < 1ms WAIT 0 < t < 10ms ON • External dimensions (Units: mm) 9.0 0.3 7.0 0 0.15 0.8 0.4 0.1 0.15 QFP32 12 V < 0.3V DD 0.1 BU9729K ...