AT25128 ATMEL Corporation, AT25128 Datasheet
AT25128
Available stocks
Related parts for AT25128
AT25128 Summary of contents
Page 1
... The devices are available in space saving 8-lead PDIP (AT25128/256), 8-lead EIAJ SOIC (AT25128/256), 8-lead and 16-lead JEDEC SOIC (AT25128), 14-lead TSSOP (AT25128), 20-lead TSSOP (AT25128/256), and 8-lead Leadless Array (AT25256) packages. In addition, the entire family is available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 5.5V) versions. Table 1. Pin Configuration ...
Page 2
... Figure 1. Block Diagram AT25128/256 2 The AT25128/256 is enabled through the Chip Select pin (CS) and accessed via a 3- wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (SCK). All programming cycles are completely self-timed, and no separate Erase cycle is required before Write. ...
Page 3
... 5.0V 0°C to 70° 3 4.5 ≤ V ≤ 5. –1 0. 1.8V ≤ V ≤ 3. –100 µA OH AT25128/256 = +5.0V (unless otherwise noted) CC Max Units +1.8V to +5.5V, CC Min Typ Max 1.8 5.5 2.7 5.5 4.5 5.5 2.0 3.0 3.0 5.0 0.1 2.0 0.2 2.0 2.0 5.0 –3.0 3.0 –3.0 3.0 –1 ...
Page 4
... Data In Hold Time H t Hold Setup Time HD t Hold Hold Time CD t Output Valid V t Output Hold Time HO t Hold to Output Low Z LZ AT25128/256 4 = 40° 85° 40°C to +125°C, V – – Voltage Min 4.5 – 5.5 0 2.7 – 5.5 0 1.8 – 5.5 0 4.5 – 5.5 2.7 – ...
Page 5
... WPEN bit in the status register is “0”. This will allow the user to install the AT25128/256 in a system with the WP pin tied to ground and still be able to write to the status register. All WP pin functions are enabled when the WPEN bit is set to “ ...
Page 6
... The AT25128/256 is designed to interface directly with the synchronous serial periph- eral interface (SPI) of the 6800 type series of microcontrollers. The AT25128/256 utilizes an 8-bit instruction register. The list of instructions and their operation codes are contained in Table 5. All instructions, addresses, and data are transferred with the MSB first and start with a high-to-low CS transition. ...
Page 7
... Bits 0 – 7 are “1”s during an internal write cycle. WRITE STATUS REGISTER (WRSR): The WRSR instruction allows the user to select one of four levels of protection. The AT25128/256 is divided into four array segments. Top quarter (1/4), top half (1/2), or all of the memory segments can be protected. Any of the data within any selected segment will therefore be READ only ...
Page 8
... X High 1 READ SEQUENCE (READ): Reading the AT25128/256 via the SO pin requires the following sequence. After the CS line is pulled low to select a device, the READ op-code is transmitted via the SI line followed by the byte address to be read (see Table 10 on page 9). Upon completion, any data on the SI line will be ignored. The data (D7 the specified address is then shifted out onto the SO line ...
Page 9
... V OL 0872O–SEEPR–03/05 The AT25128/256 is capable of a 64-byte page write operation. After each byte of data is received, the six-low order address bits are internally incremented by one; the high- order bits of the address will remain constant. If more than 64 bytes of data are transmit- ted, the address counter will roll over and the previously written data will be overwritten ...
Page 10
... Figure 4. WREN Timing Figure 5. WRDI Timing Figure 6. RDSR Timing CS 0 SCK SI INSTRUCTION HIGH IMPEDANCE SO AT25128/256 MSB DATA OUT 0872O–SEEPR–03/05 ...
Page 11
... Figure 7. WRSR Timing Figure 8. READ Timing Figure 9. WRITE Timing 0872O–SEEPR–03/05 AT25128/256 11 ...
Page 12
... Figure 10. HOLD Timing CS SCK HOLD SO AT25128/256 0872O–SEEPR–03/05 ...
Page 13
... AT25128N1-10SI-1.8 AT25128T1-10TI-1.8 AT25128N-10SJ-2.7 AT25128N-10SJ-1.8 AT25128N-10SE-2.7 Notes: 1. This device is not recommended for new designs. Please refer to AT25128A. 2. For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC Characteristics tables. 8P3 8-lead, 0.300" Wide, Plastic Dual In-line Package (PDIP) 8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC) 8S2 8-lead, 0.200" ...
Page 14
... Wide, Plastic Gull Wing Small Outline Package (EIAJ SOIC) 8CN3 8-lead, 0.230" Wide, Leadless Array Package (LAP) 20A2 20-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) – 2.7 Low-voltage (2.7V to 5.5V) – 1.8 Low-voltage (1.8V to 5.5V) AT25128/256 14 Package 8P3 8S2 8CN3 20A2 8P3 8S2 8CN3 20A2 ...
Page 15
... Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm). 2325 Orchard Parkway San Jose, CA 95131 R 0872O–SEEPR–03/ TITLE 8P3, 8-lead, 0.300" Wide Body, Plastic Dual In-line Package (PDIP) AT25128/256 End View COMMON DIMENSIONS (Unit of Measure = inches) MIN SYMBOL NOM MAX A – – 0.210 A2 ...
Page 16
... JEDEC SOIC Top View e Side View Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT25128/256 TITLE 8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing ...
Page 17
... Values b and C apply to pb/Sn solder plated terminal. The standard thickness of the solder layer shall be 0.010 +0.010/−0.005 mm. 2325 Orchard Parkway San Jose, CA 95131 R 0872O–SEEPR–03/ ∅ End View TITLE 8S2, 8-lead, 0.209" Body, Plastic Small Outline Package (EIAJ) AT25128/256 E1 L COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM MAX SYMBOL A 1.70 2.16 A1 0.05 0. ...
Page 18
... Bottom View Note: 1. Metal Pad Dimensions. 2. All exposed metal area shall have the following finished platings. Ni: 0.0005 to 0.015 mm Au: 0.0005 to 0.001 mm 1150 E.Cheyenne Mtn Blvd. Colorado Springs, CO 80906 R AT25128/256 18 D Pin1 Corner TITLE 8CN3, 8-lead 1.04 mm Body), Lead Pitch 1.27 mm, ...
Page 19
... The lead width B, as measured 0.36 mm (0.014 in) or greater above the seating plane, shall not exceed a maximum value of 0.61 mm (0.024 in). 2325 Orchard Parkway San Jose, CA 95131 R 0872O–SEEPR–03/ TITLE 16S1, 16-lead, 0.150" Body, Plastic Gull Wing Small Outline (SOIC ) AT25128/256 COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM MAX SYMBOL A 1.35 – 1.75 B 0.33 – ...
Page 20
... Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07 mm. 5. Dimension D and determined at Datum Plane H. 2325 Orchard Parkway San Jose, CA 95131 R AT25128/256 20 SYMBOL ...
Page 21
... Minimum space between protrusion and adjacent lead is 0.07 mm. 5. Dimension D and determined at Datum Plane H. 2325 Orchard Parkway San Jose, CA 95131 R 0872O–SEEPR–03/ TITLE 20A2, 20-lead (4.4 x 6.5 mm Body), 0.65 pitch, Thin Shrink Small Outline Package (TSSOP) AT25128/256 L L1 End View COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM D 6.40 6 ...
Page 22
... Atmel Corporation 2005. All rights reserved. Atmel®, logo and combinations thereof, and others are registered trademarks, and Everywhere SM You Are and others are the trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory ...