UPD75P308GF-3B9 Renesas Electronics Corporation., UPD75P308GF-3B9 Datasheet

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UPD75P308GF-3B9

Manufacturer Part Number
UPD75P308GF-3B9
Description
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Document No.
Date Published November 1993 P
Printed in Japan
(O. D. No.
IC-2472B
IC-7208C)
FEATURES
DESCRIPTION
internal mask ROM.
quantity of many different types of application systems as data can only be written once to the one-time
PROM of this type. Programs can be written and rewritten to the built-in EPROM type making it ideal
for system evaluation.
ORDERING INFORMATION
QUALITY GRADE
Please refer to "Quality Grade on NEC Semiconductor Devices" (Document number IEI-1209) published by NEC
Corporation to know the specification of quality grade on the devices and its recommended applications.
The PD75P308 is a model of the PD75308 equipped with a one-time PROM or EPROM instead of an
Two types are available as the PD75P308. The one-time PROM type is ideal for production of a small
Detailed functions are described in the followig user's manual. Be sure to read it for designing.
The function common to the one-time PROM and EPROM types of product is referred to as PROM throughout this document.
Memory capacity
• Program memory (PROM): 8064 x 8 bits
• Data memory (RAM): 512 x 4 bits
Can be connected to a pull-up resistor through software: Ports 0-3, 6, 7
Open-drain input/output: Ports 4 and 5
Single power source: 5V
PD75308 compatible
PD75P308GF-3B9
PD75P308K
PD75P308GF-001-3B9
PD75P308K
Part Number
Part Number
4-BIT SINGLE-CHIP MICROCOMPUTER
The information in this document is subject to change without notice.
5%
80-pin plastic QFP (14 x 20 mm)
80-pin ceramic WQFN (LCC w/window)
80-pin plastic QFP (14 x 20 mm)
80-pin Ceramic WQFN (LCC w/window)
PD75308 User's Manual: IEM-5016
The mark
DATA SHEET
shows major revised points.
Package
Package
MOS INTEGRATED CIRCUIT
PD75P308
One-time PROM
EPROM
Quality Grade
Internal ROM
Standard
Standard
NEC Corporation 1989

Related parts for UPD75P308GF-3B9

UPD75P308GF-3B9 Summary of contents

Page 1

DESCRIPTION The PD75P308 is a model of the PD75308 equipped with a one-time PROM or EPROM instead of an internal mask ROM. Two types are available as the PD75P308. The one-time PROM type is ideal for production of a small ...

Page 2

PIN CONFIGURATION S12 1 S13 2 S14 3 S15 4 S16 5 S17 6 S18 7 S19 8 S20 9 S21 10 S22 11 ...

Page 3

BASIC INTERVAL TIMER INTBT PROGRAM COUNTER(13) TI0/P13 TIMER/EVENT COUNTER PTO0/P20 #0 INTT0 WATCH BUZ/P23 TIMER PROGRAM MEMORY f INTW LCD SI/SBI/P03 SERIAL SO/SB0/P02 INTERFACE SCK/P01 8064 x 8 BITS INTCSI INT0/P10 INT1/P11 INTERRUPT INT2/P12 CONTROL INT4/P00 8 KR0/P60- KR3/P63, KR4/P70- ...

Page 4

PIN FUNCTIONS ................................................................................................................................. 1.1 PORT PINS ................................................................................................................................................. 5 1.2 NON PORT PINS ....................................................................................................................................... 6 1.3 PIN INPUT/OUTPUT CIRCUITS ................................................................................................................ 7 1.4 NOTES ON USING P00/INT4 AND RESET PINS ..................................................................................... 9 2. DIFFERENCES BETWEEN PD75P308 AND PD75308 .................................................................. 3. WRITING ...

Page 5

PIN FUNCTIONS 1.1 PORT PINS Also Served Pin Name Input/Output As P00 Input INT4 4-bit input port (PORT0) P01 Input/Output SCK Pull-up resistors can be specified in 3-bit P02 Input/Output SO/SB0 units for the P01 to P03 pins by ...

Page 6

NON PORT PINS Also Served Pin Name Input/Output As Timer/event counter external event pulse input TI0 Input P13 Timer/event counter output PTO0 Output P20 Clock output PCL Input/Output P22 Fixed frequency output (for buzzer or for trimming BUZ Input/Output ...

Page 7

PIN INPUT/OUTPUT CIRCUITS The following shows a simplified input/output circuit diagram for each pin of the PD75P308. TYPE A (for TYPE E– P–ch IN N–ch Input buffer of CMOS standard TYPE B IN Schmitt trigger input with ...

Page 8

TYPE F– A P.U.R. enable data Type D output disable Type B P.U.R. : Pull–Up Resistor TYPE F–B P.U.R. enable output disable (P) data output disable output disable (N) P.U.R. : Pull–Up Resistor TYPE G–A V LC0 P-ch V LC1 ...

Page 9

TYPE M-C P.U.R. enable data N-ch output disable P.U.R. : Pull–Up Resistor 1.4 NOTES ON USING P00/INT4 AND RESET PINS In addition to the functions shown in sections 1.1 and 1.2, the P00/INT4 and RESET pins also have a function ...

Page 10

DIFFERENCES BETWEEN PD75P308 AND PD75308 The PD75P308 is a model of the Programs can be rewritten to the PROM of the PD75P308. Table 2-1 shows the differences between the PD75P308 and PD75308. You should fully consider these differences when ...

Page 11

WRITING AND VERIFYING PROM (PROGRAM MEMORY) The program memory of the PD75P308 is a PROM of 8064 x 8 bits. To write data to or verify the contents of this PROM, the pins listed in the table below are ...

Page 12

PROGRAM MEMORY WRITE PROCEDURE The program memory write procedure is as follows. High-speed program memory write is possible. (1) Ground the unused pins through pull-down resistors. The X1 pin must be low. (2) Supply the V ...

Page 13

PROGRAM MEMORY READ PROCEDURE The contents of the program memory can be read in the following procedure. (1) Ground the unused pins through pull-down resistors. The X1 pin must be low. (2) Supply the V and ...

Page 14

ERASURE ( PD75P308K ONLY) The contents of the data programmed to the PD75P308 can be erased by exposing the window of the program memory to ultraviolet rays. The wavelength of the ultraviolet rays used to erase the contents is ...

Page 15

ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS (T Parameter Symbol Supply Voltage V DD Supply Voltage Input Voltage * Output Voltage V O High-Level Output Current I OH Low-Level Output Current * Operating ...

Page 16

MAIN SYSTEM CLOCK OSCILLATOR CIRCUIT CHARACTERISTICS (T = - Recommended Oscillator Constants Ceramic *3 Oscillation X1 X2 frequency (f Oscillation stabilization C1 C2 time * Crystal Oscilaltion ...

Page 17

SUBSYSTEM CLOCK OSCILLATOR CIRCUIT CHARACTERISTICS (T = - Recommended Oscillator Constants Crystal Oscillation XT1 XT2 frequency (f R Oscillation stabilization C3 C4 time * V DD External Clock XT1 input ...

Page 18

DC CHARACTERISTICS (T = - Parameter High-Level Input Voltage Low-Level Input Voltage High-Level Output Voltage Low-Level Output Voltage High-Level Input Leakage Current Low-Level Input Leakage Current High-Level Output Leakage Current Low-Level Output Leakage Current Internal ...

Page 19

AC CHARACTERISTICS ( Operation Other Than Serial Transfer Parameter Symbol 1 CPU Clock Cycle Time* (Minimum Instruction t CY Execution Time = 1 Machine Cycle) TI0 Input Frequency f TI TI0 Input ...

Page 20

SERIAL TRANSFER OPERATION TWO-LINE AND THREE-LINE SERIAL I/O MODES (SCK: internal clock output) Parameter Symbol SCK Cycle Time t KCY1 SCK High-, Low-Level Widths t t KH1, KL1 SI Set-Up Time (vs. SCK ) t SIK1 SI Hold Time (vs. ...

Page 21

SBI MODE (SCK: internal clock output (master)) Parameter Symbol SCK Cycle Time t KCY3 t KL3 SCK High-, Low-Level Widths t KH3 t SB0, 1 Set-Up Time (vs. SCK ) SIK3 t SB0, 1 Hold Time (vs. SCK ) KSI3 ...

Page 22

AC TIMING TEST POINT (excluding X1 and XT1 inputs CLOCK TIMING X1 input XT1 input TI0 TIMING TI0 22 0 Test points 0 1 ...

Page 23

SERIAL TRANSFER TIMING THREE-LINE SERIAL I/O MODE: SCK SI t KSO1 SO TWO-LINE SERIAL I/O MODE: SCK t KSO SB0,1 t KCY1 t t KL1 KH1 t t SIK1 KSI1 Input data Output data t KCY ...

Page 24

SERIAL TRANSFER TIMING BUS RELEASE SIGNAL TRANSFER SCK t t KSB SBL SB0,1 COMMAND SIGNAL TRANSFER SCK t KSB SB0,1 INTERRUPT INPUT TIMING INT0 KR0-7 RESET INPUT TIMING RESET 24 t KCY3 KL3,4 KH3,4 t ...

Page 25

LOW-VOLTAGE DATA RETENTION CHARACTERISTICS OF DATA MEMORY IN STOP MODE (T = - Parameter Symbol Data Retention Supply V DDDR Voltage Data Retention Supply I DDDR 1 Current* t Release Signal Set Time SREL Oscillation Stabilization ...

Page 26

DC PROGRAMMING CHARACTERISTICS (T Parameter Symbol V IH1 High-Level Input Voltage V IH2 V IL1 Low-Level Input Voltage V IL2 Input Leakage Current I LI High-Level Output Voltage V OH Low-Level Output Voltage Supply Current I DD ...

Page 27

PROGRAM MEMORY WRITE TIMING t VPS VDS P40-P43 Data input P50-P53 MD0 t PW MD1 PCR ...

Page 28

PACKAGE DRAWINGS 80 PIN PLASTIC QFP (14 20 NOTE Each lead centerline is located within 0.15 mm (0.006 inch) of its true position (T.P.) at maximum material condition ...

Page 29

PIN CERAMIC WQFN NOTE Each lead centerline is located within 0.08 mm (0.003 inch) of its true position (T.P.) at maximum material condition X80KW-80A-1 ITEM MILLIMETERS INCHES 20.0 ± 0.4 A 0.787 B ...

Page 30

RECOMMENDED SOLDERING CONDITIONS It is recommended that PD75P308 be soldered under the following conditions. For details on the recommended soldering conditions, refer to Information Document "Semiconductor Devices Mounting Manual" (IEI-616). The soldering methods and conditions are not listed here, ...

Page 31

APPENDIX A. DEVELOPMENT TOOLS The following development support tools are readily available to support development of systems using PD75P308: PROM writing tools *1 Hardare IE-75000-R In-circuit emulator for 75K series IE-75001-R *2 IE-75000-R-EM Emulation board for IE-75000-R and IE-75001-R EP-75308GF-R ...

Page 32

APPENDIX B. RELATED DOCUMENTS 32 PD75P308 ...

Page 33

GENERAL NOTES ON CMOS DEVICES 1 STATIC ELECTRICITY (ALL MOS DEVICES) Exercise care so that MOS devices are not adversely influenced by static electricity while being handled. The insulation of the gates of the MOS device may be destroyed by ...

Page 34

No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. ...

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