HM514260CJ-7 HITACHI, HM514260CJ-7 Datasheet

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HM514260CJ-7

Manufacturer Part Number
HM514260CJ-7
Description
Manufacturer
HITACHI
Datasheet

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Description
The Hitachi HM51(S)4260C is CMOS dynamic RAM organized as 262,144-word
has realized higher density, higher performance and various functions by employing 0.8 m CMOS process
technology and some new CMOS circuit design technologies. The HM51(S)4260C offers fast page mode as a
high speed access mode. Multiplexed address input permits the HM51(S)4260C to be packaged in standard
400-mil 40-pin plastic SOJ and standard 400-mil 44-pin plastic TSOPII. Internal refresh timer enables
HM51S4260C self refresh operation.
Features
Single 5 V ( 10%) (HM51(S)4260C-6/7/8)
High speed
— Access time: 60 ns/70 ns/80 ns (max)
Low power dissipation
— Active mode: 825 mW/788 mW/770 mW/688 mW (max)
— Standby mode: 11 mW (max) (HM51(S)4260C-6/7/8)
Fast page mode capability
512 refresh cycles: 8 ms
2 CAS-byte control
2 variations of refresh
— RAS-only refresh
— CAS-before-RAS refresh
Battery backup operation (L-version)
Self refresh operation (HM51S4260C)
262,144-word 16-bit Dynamic Random Access Memory
( 5%) (HM51(S)4260C-6R)
10.5 mW (max) (HM51(S)4260C-6R)
1.1 mW (max) (L-version) (HM51(S)4260C-6/7/8)
1.05 mW (max) (L-version) (HM51(S)4260C-6R)
128 ms (L-version)
HM51S4260C Series
HM514260C Series
16-bit. HM51(S)4260C
ADE-203-260A (Z)
Jun. 12, 1995
Rev. 1.0

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HM514260CJ-7 Summary of contents

Page 1

... Dynamic Random Access Memory Description The Hitachi HM51(S)4260C is CMOS dynamic RAM organized as 262,144-word has realized higher density, higher performance and various functions by employing 0.8 m CMOS process technology and some new CMOS circuit design technologies. The HM51(S)4260C offers fast page mode as a high speed access mode ...

Page 2

... HM514260C, HM51S4260C Series Ordering Information Type No. Access Time HM514260CJ HM514260CJ- HM514260CJ-7 HM514260CJ HM514260CLJ HM514260CLJ- HM514260CLJ HM514260CLJ HM51S4260CJ HM51S4260CJ- HM51S4260CJ HM51S4260CJ HM51S4260CLJ HM51S4260CLJ- HM51S4260CLJ HM51S4260CLJ HM514260CTT-6 ...

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... Pin Arrangement HM514260CJ/CLJ Series HM51S4260CJ/CLJ Series RAS (Top view) Pin Description Pin Name Function Address input – ...

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HM514260C, HM51S4260C Series Block Diagram Row Row Row Decoder Decoder Decoder Selector I/O4 I/O3 I/O2 I/O4 Buffer I/O3 I/O2 Buffer Buffer I/O5 I/O5 Buffer I/O6 I/O6 Buffer I/O7 I/O7 Buffer WE RAS Address Selector Row Row Row Decoder Decoder Decoder ...

Page 5

Operation Mode The HM51(S)4260C series has the following 11 operation modes. 1. Read cycle 2. Early write cycle 3. Delayed write cycle 4. Read- modify-write cycle 5. RAS-only refresh cycle 6. CAS-before-RAS refresh cycle 7. Self refresh cycle(HM51S4260C) 8. Fast ...

Page 6

HM514260C, HM51S4260C Series Absolute Maximum Ratings Parameter Voltage on any pin relative Supply voltage relative Short circuit output current Power dissipation Operating temperature Storage temperature Recommended DC Operating Conditions ( +70 ...

Page 7

DC Characteristics ( ( (HM51(S)4260C-6/7/8) HM514260C, HM51S4260C -6/-6R Parameter Symbol Min Max Min Max Min Max Unit Test Conditions Operating I — CC1 *1, *2 current Standby current ...

Page 8

HM514260C, HM51S4260C Series DC Characteristics ( ( (HM51(S)4260C-6/7/8) (cont) HM514260C, HM51S4260C -6/-6R Parameter Symbol Min Max Min Max Min Max Unit Test Conditions Input leakage I –10 10 ...

Page 9

AC Characteristics ( (HM51(S)4260C-6R) ( (HM51(S)4260C-6/7/8) Test Conditions • Input rise and fall time • Input timing reference levels: 0.8 V, 2.4 V • Input levels: ...

Page 10

HM514260C, HM51S4260C Series Read Cycle Parameter Access time from RAS Access time from CAS Access time from address Access time from OE Read command setup time Read command hold time to CAS Read command hold time to RAS Column address ...

Page 11

Read-Modify-Write Cycle Parameter Read-modify-write cycle time RAS to WE delay time CAS to WE delay time Column address to WE delay time OE hold time from WE Refresh Cycle Parameter CAS setup time (CBR refresh cycle) CAS hold time (CBR ...

Page 12

HM514260C, HM51S4260C Series Self refresh Mode Parameter RAS pulse width (self refresh) RAS precharge time (self refresh) CAS hold time (self refresh) Notes measurements assume t 2. Assumes that t t RCD RCD recommended value shown in this ...

Page 13

UCAS and LCAS are high. 22. t and t CPN CP 23. When output buffers are enabled once, sustain the low impedance state until valid data is obtained. When output buffer is turned ...

Page 14

HM514260C, HM51S4260C Series Notes concerning 2CAS control Please do not separate the UCAS/LCAS operation timing intentionally. UCAS/LCAS are allowed under the following conditions. (1) Each of the UCAS/LCAS should satisfy the timing specifications individually. (2) Different operation mode for upper/lower ...

Page 15

Timing Waveforms Read Cycle RAS t T UCAS LCAS t t ASR t RAH Row Address WE Dout Din OE HM514260C, HM51S4260C Series RAS t RSH t CAS t RCD t CSH t RAD RAL t ...

Page 16

HM514260C, HM51S4260C Series Early Write Cycle RAS t T UCAS LCAS t ASR t RAH Row Address WE Din Dout RAS t RSH t t RCD CAS t CSH t t ASC CAH Column t t WCH ...

Page 17

Delayed Write Cycle RAS RCD UCAS LCAS t t ASR t RAH Address Row WE Din t t DZO High-Z Dout OE HM514260C, HM51S4260C Series RAS t CSH t RSH t CAS t CWL ...

Page 18

HM514260C, HM51S4260C Series Read-Modify-Write Cycle t T RAS UCAS LCAS t RAD t ASR t RAH Address Row t RCS WE t RAC Din High-Z Dout t DZO OE t RWC t RCD t ASC t CAH Column t CWD ...

Page 19

RAS-Only Refresh Cycle RAS t CRP UCAS LCAS Address Dout HM514260C, HM51S4260C Series RAS RPC t RAH t ASR Row High Refresh address : A0 – A8 (AX0 ...

Page 20

HM514260C, HM51S4260C Series CAS-Before-RAS Refresh Cycle t RP RAS RPC t t CPN CSR UCAS LCAS Address t OFF1 Dout RAS RP RAS t RPC CHR CPN ...

Page 21

Fast Page Mode Read Cycle RAS CSH t RCD UCAS LCAS t RAD ASR RAH ASC Address Row t RCS WE t DZC Din t RAC High-Z Dout t DZO OE HM514260C, HM51S4260C Series ...

Page 22

HM514260C, HM51S4260C Series Fast Page Mode Early Write Cycle RAS RCD UCAS LCAS t t ASR RAH Address Row WE t Din Dout t RASC t CSH CAS CP CAS t t ...

Page 23

Fast Page Mode Delayed Write Cycle RAS t CSH RCD UCAS LCAS t t ASC ASR t RAH Address Row t RCS WE Din Dout t ODD OE HM514260C, HM51S4260C Series t RASC ...

Page 24

HM514260C, HM51S4260C Series Fast Page Mode Read-Modify-Write Cycle RAS t RCD t T UCAS t RAD LCAS t RAH t CAH t ASR t ASC Row Address Column t AWD t CWD t RCS t RWD CAC ...

Page 25

Self Refresh Cycle t RP RAS RPC t t CPN CSR UCAS LCAS Address t OFF1 Dout The low self refresh current is achieved by introducing extremely long internal refresh cycle. Therefore some care needs to be ...

Page 26

HM514260C, HM51S4260C Series Package Dimensions HM51(S)4260CJ/CLJ Series (CP-40DA) 25.80 26.16 Max 40 1 0.74 1.30 Max 0.43 ± 0. 1.27 0.10 26 Unit: mm 9.40 ± 0.25 ...

Page 27

HM51(S)4260CTT/CLTT Series (TTP44/40DB) 18.81 Max 44 1 0.27 ± 0.07 1.005 Max HM514260C, HM51S4260C Series 18. 0.80 0.13 M 11.76 ± 0.20 0.10 0.50 ± 0.10 27 Unit – 5° 0.80 ...

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