STA529Q STMicroelectronics, STA529Q Datasheet - Page 33

• Manufacturer Part Number: STA529Q
• Description: IC AMP 2X100MW CLASS D 52VFQFPN
• Manufacturer: STMicroelectronics
• Series: Sound Terminal™r
• Type: Class Dr

Specifications of STA529Q

• Output Type: 2-Channel (Stereo)
• Max Output Power X Channels @ Load: 100mW x 2 @ 16 Ohm
• Voltage - Supply: 1.5 V ~ 1.95 V
• Features: Depop, I²C, I²S, Mute, Volume Control
• Mounting Type: Surface Mount
• Package / Case: 52-VFQFN, 52-VFQFPN
• Ic Function: FFX Audio Codec Analogue & Digital Inputs, Class D Amplifier
• Brief Features: Up To 96dB Dynamic Range, FFX Class-D Driver
• Supply Voltage Range: 1.55V To 1.95V, 1.8V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8879

STA529
10.6
10.6.1
10.6.2
10.7
10.7.1
10.7.2
10.7.3
Write operation
Following the start condition the master sends a device select code with the R/W bit set to 0.
The STA529 acknowledges this and then writes to the byte of the internal address. After
receiving the internal byte address, the STA529 responds with an acknowledgement.
Byte write
In the byte-write mode the master sends one data byte. This is acknowledged by the
STA529. The master then terminates the transfer by generating a stop condition.
Multi-byte write
The multi-byte write modes can start from any internal address. The master generates a
stop condition which terminates the transfer.
Read operation
Current address byte read
Following the start condition the master sends a device select code with bit R/W set to 1.
The STA529 acknowledges this and then responds by sending one byte of data. The master
then terminates the transfer by generating a stop condition.
Current address multi-byte read
The multi-byte read modes can start from any internal address. Sequential data bytes are
read from sequential addresses within the STA529. The master acknowledges each data
byte read and then generates a stop condition terminating the transfer.
Random address byte read
Following the start condition the master sends a device select code with bit R/W set to 0.
The STA529 acknowledges this and then the master writes the internal address byte. After
receiving the internal byte address, the STA529 again responds with an acknowledgement.
The master then initiates another start condition and sends the device select code with bit
R/W set to 1. The STA529 acknowledges this and then responds by sending one byte of
data. The master then terminates the transfer by generating a stop condition.
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