24C32 Microchip Technology Inc., 24C32 Datasheet

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24C32

Manufacturer Part Number
24C32
Description
Manufacturer
Microchip Technology Inc.
Datasheet

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FEATURES
• Voltage operating range: 4.5V to 5.5V
• Industry standard two-wire bus protocol, I
• Self-timed write cycle (including auto-erase)
• Power on/off data protection circuitry
• Endurance:
• 8 byte page, or byte modes available
• 1 page x 8 line input cache (64 bytes) for fast write
• Schmitt trigger, filtered inputs for noise suppres-
• Output slope control to eliminate ground bounce
• 2 ms typical write cycle time, byte or page
• Up to 8 chips may be connected to the same bus
• Electrostatic discharge protection > 4000V
• Data retention > 200 years
• 8-pin PDIP/SOIC packages
• Temperature ranges
DESCRIPTION
The Microchip Technology Inc. 24C32 is a 4K x 8 (32K
bit) Serial Electrically Erasable PROM. This device has
been developed for advanced, low power applications
such as personal communications or data acquisition.
The 24C32 features an input cache for fast write loads
with a capacity of eight 8-byte pages, or 64 bytes. It
also features a fixed 4K-bit block of ultra-high endur-
ance memory for data that changes frequently. The
24C32 is capable of both random and sequential reads
up to the 32K boundary. Functional address lines allow
up to eight 24C32 devices on the same bus, for up to
256K bits address space. Advanced CMOS technol-
ogy makes this device ideal for low-power non-volatile
code and data applications. The 24C32 is available in
the standard 8-pin plastic DIP and 8-pin surface mount
SOIC package
I
Smart Serial is a trademark of Microchip Technology Inc.
2
C is a trademark of Philips Corporation.
- Peak write current 3 mA at 5.5V
- Maximum read current 150 A at 5.5V
- Standby current 1 A typical
compatible
- Including 100 kHz and 400 kHz modes
- 10,000,000 Erase/Write cycles
- 1,000,000 E/W cycles guaranteed for
loads
sion
for up to 256K bits total memory
- Commercial (C):
- Industrial (I):
2004 Microchip Technology Inc.
guaranteed for High Endurance Block
Standard Endurance Block
32K 5.0V I
-40°C to
0°C to
+70°C
+85°C
2
C
2
C
Smart Serial
PACKAGE TYPES
BLOCK DIAGRAM
SDA
I/O
V
V
CONTROL
CC
SS
LOGIC
I/O
PDIP
SOIC
Obsolete Device
Please use 24LC32A or 24LC65.
SCL
V
A0
A1
A2
SS
V
A0
A0
A1
A2
SS
EEPROM
CONTROL
MEMORY
A1
LOGIC
A2
1
2
3
4
1
2
3
4
24C32
XDEC
8
7
6
5
8
7
6
5
DS21061H-page 1
HV GENERATOR
PAGE LATCHES
R/W CONTROL
SENSE AMP
V
NC
SCL
SDA
EEPROM
ARRAY
CC
V
NC
SCL
SDA
CACHE
YDEC
CC

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24C32 Summary of contents

Page 1

... The 24C32 is capable of both random and sequential reads up to the 32K boundary. Functional address lines allow up to eight 24C32 devices on the same bus, for up to 256K bits address space. Advanced CMOS technol- ogy makes this device ideal for low-power non-volatile code and data applications ...

Page 2

... ELECTRICAL CHARACTERISTICS 1.1 Maximum Ratings* V ..................................................................................7.0V CC All inputs and outputs w.r.t. V ............... -0. Storage temperature .....................................-65°C to +150°C Ambient temp. with power applied ................-65°C to +125°C Soldering temperature of leads (10 seconds) ............. +300°C ESD protection on all pins *Notice: Stresses above those listed under “Maximum Ratings” ...

Page 3

... Schmitt trigger inputs which provide improved specification for standard operation HIGH DAT SU DAT 24C32 Units Remarks kHz (Note 1) ns (Note 1) ns After this period the first clock pulse is generated ns Only relevant for repeated START condition ...

Page 4

... NOT generating an acknowledge bit on the last byte that has been clocked out of the slave. In this case, the slave (24C32) will leave the data line HIGH to enable the master to generate the STOP condition. (D) ...

Page 5

... R SLAVE DEVICE ADDRESS SELECT BUS 2004 Microchip Technology Inc. an acknowledge signal on the SDA line. Depending on the state of the R/W bit, the 24C32 will select a read or write operation. Control Operation Code Read 1010 Write 1010 FIGURE 3-2: CONTROL BYTE ALLOCATION START ...

Page 6

... Page Write The write control byte, word address and the first data byte are transmitted to the 24C32 in the same way byte write. But instead of generating a stop condi- tion, the master transmits up to eight pages of eight data bytes each (64 bytes total) which are temporarily stored in the on-chip page cache of the 24C32 ...

Page 7

... To perform this type of read operation, first the word address must be set. This is done by sending the word address to the 24C32 as part of a write operation (R/W bit set to 0). After the word address is sent, the master generates a start condition following the acknowledge. This termi- nates the write operation, but not before the internal address pointer is set ...

Page 8

... The device select bits A2, A1, A0 can be used to expand the contiguous address space for up to 256K bits by adding up to eight 24C32's on the same bus. In this case, software can use A0 of the control byte as address bit A12 address bit A13, and A2 as address bit A14 ...

Page 9

... PIN DESCRIPTIONS 8.1 A0, A1, A2 Chip Address Inputs The A0..A2 inputs are used by the 24C32 for multiple device operation and conform to the two-wire bus stan- dard. The levels applied to these pins define the address block occupied by the device in the address map. A particular device is selected by transmitting the corresponding bits (A2, A1, A0) in the control byte (Figure 3-3) ...

Page 10

... FIGURE 8-1: CACHE WRITE TO THE ARRAY STARTING AT A PAGE BOUNDARY 1 Write command initiated at byte 0 of page 3 in the array; First data byte is loaded into the cache byte 0. cache page 0 cache cache byte 0 byte 1 3 Write from cache into array initiated by STOP bit. ...

Page 11

... Product Identification System To order or to obtain information, e.g., on pricing or delivery, please use the listed part numbers, and refer to the factory or the listed sales offices. 24C32 - /P Package: Temperature Range: Device: Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom- mended workarounds ...

Page 12

... NOTES: DS21061H-page 12 2004 Microchip Technology Inc. ...

Page 13

... Use of Microchip’s products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights.  2004 Microchip Technology Inc. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC ...

Page 14

... Via Salvatore Quasimodo, 12 20025 Legnano (MI) Milan, Italy Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands Waegenburghtplein 4 NL-5152 JR, Drunen, Netherlands Tel: 31-416-690399 Fax: 31-416-690340 United Kingdom 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44-118-921-5869 Fax: 44-118-921-5820 07/12/04  2004 Microchip Technology Inc. ...

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