ML65244CK Micro Linear, ML65244CK Datasheet

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ML65244CK

Manufacturer Part Number
ML65244CK
Description
High speed dual quad buffer/line drivers
Manufacturer
Micro Linear
Datasheet
GENERAL DESCRIPTION
The ML65244 and ML65L244 are non-inverting dual quad
buffer/line drivers. The high operating frequency (50MHz
driving a 50pF load) and low propagation delay
(ML65244 – 1.7ns, ML65L244 – 2ns) make them ideal for
very high speed applications such as processor bus
buffering and cache and main memory control.
These buffers use a unique analog implementation to
eliminate the delays inherent in traditional digital designs.
Schottky clamps reduce under and overshoot, and special
output driver circuits limit ground bounce. The ML65244
and ML65L244 conform to the pinout and functionality of
the industry standard FCT244 and are intended for
applications where propagation delay is critical to the
system design.
Note: This part was previously numbered ML6582.
BLOCK DIAGRAM
2G
1G
19
1
GND
V CC
V CC
20
10
High Speed Dual Quad Buffer/Line Drivers
YAO
AO
18
2
YBO
BO
17
3
YA1
16
A1
4
YB1
15
B1
5
FEATURES
Low propagation delay — 1.7ns ML65244
Fast Dual 4-bit TTL level buffer/line driver with tri-state
capability on the output (two 4-bit sections)
TTL compatible input and output levels
Schottky diode clamps on all inputs to handle
undershoot and overshoot
Onboard schottky diodes minimize noise
Reduced output swing of 0 – 4.1 volts
Ground bounce controlled outputs, typically less
than 400mV
Industry standard FCT244 type pinout
Applications include high speed cache memory, main
memory, processor bus buffering, and graphics cards
YA2
14
A2
6
ML65244/ML65L244*
YB2
B2
13
7
YA3
12
A3
*This Part Is Obsolete
8
2.0ns ML65L244
YB3
B3
11
9
August 1996
1

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ML65244CK Summary of contents

Page 1

High Speed Dual Quad Buffer/Line Drivers GENERAL DESCRIPTION The ML65244 and ML65L244 are non-inverting dual quad buffer/line drivers. The high operating frequency (50MHz driving a 50pF load) and low propagation delay (ML65244 – 1.7ns, ML65L244 – 2ns) make them ideal ...

Page 2

ML65244/ML65L244 PIN CONFIGURATION PIN DESCRIPTION NAME I/O DESCRIPTION Ai I Data Bus A YAi O Data Bus Data Bus B YBi O Data Bus Output Enable for data bus Output Enable ...

Page 3

ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for: V SYMBOL PARAMETER AC ELECTRICAL CHARACTERISTICS (C LOAD Propagation delay Ai to YAi YBi (Note 2) PLH PHL t Output enable time OE 1G ...

Page 4

ML65244/ML65L244 CH1 1.00V CH2 1.00V 74FCT244 Figure 1. Ground Bounce Comparison, Four Outputs Switching into 50pF Loads. 220 200 180 160 140 120 100 0.0 0.5 1.0 1.5 V (V) OL Figure 2a. Typical V ...

Page 5

... The best of these CMOS buffers has managed to drive a 50pF load capacitance with a delay of 3.2ns. Micro Linear has produced a dual quad buffer/line driver with a delay less than 1.7ns by using a unique circuit architecture that does not require cascaded logic gates ...

Page 6

ML65244/ML65L244 The basic architecture of the ML65244 is shown in Figure implemented on a 1.5 m BiCMOS process. However, in this particular circuit, all of the active devices are NPNs — the fastest devices available in the ...

Page 7

PHYSICAL DIMENSIONS 0.498 - 0.512 (12.65 - 13.00) 20 PIN 0.024 - 0.034 0.050 BSC (0.61 - 0.86) (1.27 BSC) (4 PLACES) 0.012 - 0.020 0.090 - 0.094 (2.28 - 2.39 0.050 - 0.055 (1.27 ...

Page 8

... ML65244/ML65L244 ORDERING INFORMATION PART NUMBER ML65244CK ML65244CS ML65L244CK ML65L244CS Intel, Pentium, PCI are registered trademarks of Intel Corporation. Mips, Alpha and Sparc are registered trademarks of Silicon Graphics, DEC and Sun Microsystems respectively. © Micro Linear 1997 is a registered trademark of Micro Linear Corporation Products described in this document may be covered by one or more of the following patents, U.S.: 4,897,611 ...

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