AD8138ARM Analog Devices Inc, AD8138ARM Datasheet - Page 8

• Manufacturer Part Number: AD8138ARM
• Description: IC AMP DIFF LDIST LP 95MA 8MSOP
• Manufacturer: Analog Devices Inc
• Type: ADC Driverr

Specifications of AD8138ARM

• Rohs Status: RoHS non-compliant
• Design Resources: DC-Coupled, Single-Ended-to-Differential Conversion Using AD8138 and AD7352 (CN0040) DC-Coupled, Single-Ended-to-Differential Conversion Using AD8138 and AD7356 (CN0041) DC-Coupled, Single-Ended-to-Differential Conversion Using AD8138 and AD7357 (CN0061)
• Applications: Data Acquisition
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Number Of Channels: 1
• Number Of Elements: 1
• Power Supply Requirement: Single/Dual
• Common Mode Rejection Ratio: 70dB
• Voltage Gain Db: 0.028dB
• Input Resistance: 6@5VMohm
• Input Offset Voltage: 2.5@5VmV
• Input Bias Current: 7@5VnA
• Single Supply Voltage (typ): 3/5/9V
• Dual Supply Voltage (typ): ±3/±5V
• Power Supply Rejection Ratio: 70dB
• Power Dissipation: 550mW
• Rail/rail I/o Type: No
• Single Supply Voltage (min): 2.7V
• Single Supply Voltage (max): 11V
• Dual Supply Voltage (min): ±1.4V
• Dual Supply Voltage (max): ±5.5V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 8
• Package Type: MSOP
• Lead Free Status / RoHS Status: Not Compliant

AD8138
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 7. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
Mnemonic
−IN
V
V+
+OUT
−OUT
V−
NC
+IN
OCM
Description
Negative Input Summing Node.
Voltage applied to this pin sets the common-mode output voltage with a ratio of 1:1. For example,
1 V dc on V
Positive Supply Voltage.
Positive Output. Note that the voltage at −D
Negative Output. Note that the voltage at +D
Negative Supply Voltage.
No Connect.
Positive Input Summing Node.
OCM
sets the dc bias level on +OUT and −OUT to 1 V.
+OUT
V
OCM
–IN
V+
Figure 4. Pin Configuration
1
2
3
4
NC = NO CONNECT
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AD8138
8
7
6
5
IN
IN
is inverted at +OUT (see Figure 42).
+IN
NC
V–
–OUT
is inverted at −OUT (see Figure 42).