5962-8983913RA Cypress Semiconductor Corporation., 5962-8983913RA Datasheet

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5962-8983913RA

Manufacturer Part Number
5962-8983913RA
Description
SPLD, PALCE16V8 Family, EECMOS Process, 300 Gates, 8 Macro Cells, 8 Reg., 8 User I/Os, 5V Supply, 15 Speed Grade, 20DIP
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Manufacturer
Quantity
Price
Part Number:
5962-8983913RA
Manufacturer:
CY
Quantity:
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Part Number:
5962-8983913RA
Quantity:
13
Cypress Semiconductor Corporation
Document #: 38-03025 Rev. **
Features
• Active pull-up on data input pins
• Low power version (16V8L)
• Standard version has low power
• CMOS Flash technology for electrical erasability and
• PCI compliant
• User-programmable macrocell
reprogrammability
— 55 mA max. commercial (10, 15, 25 ns)
— 65 mA max. industrial (10, 15, 25 ns)
— 65 mA military (15 and 25 ns)
— 90 mA max. commercial (10, 15, 25 ns)
— 115 mA max. commercial (7 ns)
— 130 mA max. military/industrial (10, 15, 25 ns)
— Output polarity control
— Individually selectable for registered or combinato-
Pin Configurations
Logic Block Diagram (PDIP/CDIP)
rial operation
GND
10
OE/I
11
9
Macrocell
8
I/O
12
I
9
8
0
Macrocell
CLK/I
8
I/O
13
I
8
GND
7
1
I
I
I
I
I
I
I
I
0
1
2
3
4
5
6
8
7
3901 North First Street
Top View
1
2
3
4
5
6
7
8
9
10
Macrocell
DIP
Reprogrammable CMOS PAL
I
I/O
7
8
6
14
PROGRAMMABLE
2
AND ARRAY
(64 x 32)
20
19
18
17
16
15
14
13
12
11
Macrocell
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
OE/I
I/O
I
8
15
5
6
CC
3
7
6
5
4
3
2
1
0
9
Functional Description
The Cypress PALCE16V8 is a CMOS Flash Electrical Eras-
able second-generation programmable array logic device. It is
implemented with the familiar sum-of-product (AND-OR) logic
structure and the programmable macrocell.
• Up to 16 input terms and 8 outputs
• 7.5 ns com’l version
• 10 ns military/industrial versions
• High reliability
16V8–2
5 ns t
5 ns t
7.5 ns t
125-MHz state machine
7 ns t
10 ns t
10 ns t
62-MHz state machine
— Proven Flash technology
— 100% programming and functional testing
Macrocell
I
8
I/O
4
5
16
4
CO
S
CO
S
PD
PD
San Jose
I
I
I
I
I
3
4
5
6
7
Macrocell
17
8
I
I/O
4
3
4
5
6
7
8
5
9 10111213
3 2 1
PLCC/LCC
Top View
Macrocell
I/O
20
8
18
I
3
2
CA 95134
6
19
18
17
16
15
14
Flash Erasable,
Revised September 3, 1998
Macrocell
I/O
I/O
I/O
I/O
I/O
I/O
I
1
2
19
6
5
4
3
2
8
16V8–3
7
PALCE16V8
®
CLK/I
V
408-943-2600
1
20
CC
Device
0
16V8–1

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5962-8983913RA Summary of contents

Page 1

Features • Active pull-up on data input pins • Low power version (16V8L) — max. commercial (10, 15, 25 ns) — max. industrial (10, 15, 25 ns) — military (15 and 25 ns) • ...

Page 2

Selection Guide Generic Part Number Com’l/Ind PALCE16V8-5 5 PALCE16V8-7 7.5 PALCE16V8-10 10 PALCE16V8-15 15 PALCE16V8-25 25 PALCE16V8L-15 15 PALCE16V8L-25 25 Shaded area contains preliminary information. Functional Description (continued) The PALCE16V8 is executed in a 20-pin 300-mil molded DIP, a 300-mil ...

Page 3

Macrocell Document #: 38-03025 Rev. ** CL0 CLK CL1 x CG for pin for pin 12 and 19 0 PALCE16V8 To ...

Page 4

Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Storage Temperature ................................. – +150 C Ambient Temperature with Power Applied............................................. – +125 C Supply Voltage to Ground Potential (Pin ...

Page 5

AC Test Loads and Waveforms Specification Closed · H: Open PZX EA Z · L: Closed · Z: Open PXZ ER L · Z: Closed ...

Page 6

Commercial and Industrial Switching Characteristic Parameter Description t Input to Output PD Propagation [8, 9] Delay Output PZX Enable Output PXZ Disable t Input to Output EA [7] Enable Delay t Input to Output ...

Page 7

Military Switching Characteristics Parameter Description t Input to Output PD Propagation Delay Output Enable PZX Output Disable PXZ t Input to Output Enable Delay EA t Input to Output Disable Delay ER t Clock ...

Page 8

Functional Logic Diagram for PALCE16V8 PIN NUMBERS PRODUCT LINE FIRST CELL NUMBERS 128 160 192 224 2 256 288 320 352 384 416 448 480 3 512 544 576 ...

Page 9

Ordering Information (mA) (ns) (ns) (ns) Ordering Code 115 PALCE16V8-5JC 115 7 PALCE16V8-7JC PALCE16V8-7PC 90 10 7.5 7 PALCE16V8-10JC PALCE16V8-10PC 130 10 7.5 7 PALCE16V8-10JI PALCE16V8-10PI 130 ...

Page 10

MILITARY SPECIFICATIONS Group A Subgroup Testing DC Characteristics Parameter Subgroups ...

Page 11

Package Diagrams (continued) Document #: 38-03025 Rev. ** 20-Lead Plastic Leaded Chip Carrier J61 20-Square Leadless Chip Carrier L61 PALCE16V8 51-85000-A 51-80049 Page ...

Page 12

Package Diagrams (continued) Document #: 38-03025 Rev. ** © Cypress Semiconductor Corporation, 1998. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in ...

Page 13

Document Title: PALCE16V8 Flash Erasable, Reprogrammable CMOS PAL® Device Document Number: 38-03025 Issue REV. ECN NO. Date ** 106370 07/11/01 Document #: 38-03025 Rev. ** Orig. of Change SZV Change from Spec Number: 38-00364 to 38-03025 PALCE16V8 Description of Change ...

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