PKF4910AR1A Ericsson Microelectronics, PKF4910AR1A Datasheet - Page 7

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PKF4910AR1A

Manufacturer Part Number
PKF4910AR1A
Description
Manufacturer
Ericsson Microelectronics
Datasheet
Output Voltage Adjust (Vadj)
Output voltage, V
or other external circuitry. If other circuitry is used, the slew rate
has to be limited to maximum 5 V/ms. If pins 8 and 9 are not
connected together the output will decrease to a low value. To
increase V
17, and to decrease V
8 and 9 (see fig. 4).
Typical required resistor value to increase V
R
where
Typical required resistor value to decrease V
R
The following typical resistor values can be used to adjust the
output voltage to 1.8 V or 2.5 V.
Current Limiting Protection (I
The output power is limited at loads above the output current
limiting threshold (I
Capacitive Load
The PKF series has no maximum limit for capacitive load on the
output. The power module may operate in current limiting mode
during start-up, affecting the ramp-up and the start-up time. For
optimum start performance we recommend maximum 100 mF/A of
I
Input and Output Impedance
Both the source impedance of the power feeding and the load
impedance will interact with the impedance of the DC/DC power
module.
It is most important to have the ratio between L and C as low as
possible, i.e. a low characteristic impedance, both at the input and
output, as the power modules have a low energy storage
capability. Use an electrolytic capacitor across the input if the
EN/LZT 146 86 R1A © Ericsson Microelectronics AB, December 2001
O
2.5 V ± 4%
1.8 V ± 4%
Output voltage
tolerance band
adj
adj
. Connect capacitors at the point of load for best performance.
= 4.20 × (4.13 – V
= 17.6 × (V
V
V
O
O
Oi
a resistor should be connected between pin 8/9 and
is the desired output voltage,
is the typical output voltage initial setting
Oi
O
– V
, can be adjusted by using an external resistor
lim
O
O
Rod
), specified as a minimum value.
O
a resistor should be connected between pin
)/(V
)/(V
19.4 k
500 k
nom
O
O
– 1.75) kW
– V
(W)
Oi
) kW
Standard values E24 (W)
33 k//47 k 1% 200 ppm
1M//1M
lim
)
O
O
is given by:
is given by:
1% 200 ppm
Figure 3
source inductance is higher than 10 mH. Their equivalent series
resistance together with the capacitance acts as a lossless damping
filter. Suitable capacitor values are in the range 10–100 mF.
Synchronization (Sync)
It is possible to synchronize the switching frequency to an
external symmetrical clock signal. The input can be driven by an
TTL-compatible output and referenced to the input pin 17.
*)
Parallel Operation
Paralleling of several converters is easily accomplished by direct
connection of the output voltage terminal pins. The load regula-
tion characteristic is specifically designed for optimum paralleling
performance. Load sharing between converters will be within
±10%. It is recommended not to exceed P
where P
number of paralleled converters, to prevent overloading any of the
converters and thereby decreasing the reliability performance.
Ordering Information
* Optional PINS version without synchronization input.
Surface mount
Through hole
Version
Rise time <10ns
Characteristics
High level
Threshold level
Low level
Sink current
Sync. frequency
Information given in this data sheet is believed to be accurate and reliable.
No responsibility is assumed for the consequences of its use nor for any infringement
of patents or other rights of third parties which may result from its use.
No license is granted by implication or otherwise under any patent or patent rights of
Ericsson Microelectronics. These products are sold only according to
Ericsson Microelectronics’ general conditions of sale, unless otherwise confirmed in
writing. Specifications subject to change without notice.
O max
is the maximum converter output power and n the
*)
Part No.
PKF 4910A SI
PKF 4910A PI *
min
520
2.2
1.2
0
typ
1.7
O
= n × 0.9 × P
max
688
6.5
2.2
0.4
1.5
O max
unit
kHz
mA
V
V
V
,
7

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