MT4LC8M8C2TG-5S Micron Semiconductor Products, MT4LC8M8C2TG-5S Datasheet

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MT4LC8M8C2TG-5S

Manufacturer Part Number
MT4LC8M8C2TG-5S
Description
Manufacturer
Micron Semiconductor Products
Datasheet
DRAM
FEATURES
• Single +3.3V ±0.3V power supply
• Industry-standard x8 pinout, timing, functions,
• 12 row, 11 column addresses (C2) or
• High-performance CMOS silicon-gate process
• All inputs, outputs and clocks are LVTTL-
• Extended Data-Out (EDO) PAGE MODE access
• 4,096-cycle CAS#-BEFORE-RAS# (CBR) REFRESH
• Optional self refresh (S) for low-power data
OPTIONS
• Refresh Addressing
• Plastic Packages
• Timing
• Refresh Rates
NOTE: 1. The 8 Meg x 8 EDO DRAM base number
*Contact factory for availability
KEY TIMING PARAMETERS
8 Meg x 8 EDO DRAM
D20_2.p65 – Rev. 5/00
SPEED
and packages
13 row, 10 column addresses (P4)
compatible
distributed across 64ms
retention
4,096 (4K) rows
8,192 (8K) rows
32-pin SOJ (400 mil)
32-pin TSOP (400 mil)
50ns access
60ns access
Standard Refresh (64ms period)
Self Refresh (128ms period)
-5
-6
2. The “#” symbol indicates signal is active LOW.
104ns
differentiates the offerings in one place—
MT4LC8M8C2. The fifth field distinguishes the
address offerings: C2 designates 4K addresses and
P4 designates 8K addresses.
84ns
t
RC
MT4LC8M8C2DJ-5
t
50ns
60ns
RAC
Part Number Example:
20ns
25ns
t
PC
25ns
30ns
t
AA
MARKING
t
13ns
15ns
CAC
None
C2
TG
P4
DJ
-5
-6
S*
t
10ns
CAS
8ns
1
MT4LC8M8P4, MT4LC8M8C2
For the latest data sheet, please refer to the Micron Web
site:
8 MEG x 8 EDO DRAM PART NUMBERS
x = speed
GENERAL DESCRIPTION
namic random-access memory devices containing
67,108,864 bits and designed to operate from 3V to
3.6V. The MT4LC8M8C2 and MT4LC8M8P4 are func-
tionally organized as 8,388,608 locations containing
eight bits each. The 8,388,608 memory locations are
arranged in 4,096 rows by 2,048 columns on the C2
version and 8,192 rows by 1,024 columns on the P4
version. During READ or WRITE cycles, each location is
RAS#
**NC on C2 version and A12 on P4 version
PART NUMBER
MT4LC8M8C2DJ-x
MT4LC8M8C2DJ-x S
MT4LC8M8C2TG-x
MT4LC8M8C2TG-x S
MT4LC8M8P4DJ-x
MT4LC8M8P4DJ-x S
MT4LC8M8P4TG-x
MT4LC8M8P4TG-x S
DQ0
DQ1
DQ2
DQ3
WE#
V
V
V
NC
A0
A1
A2
A3
A4
A5
CC
CC
CC
The 8 Meg x 8 DRAM is a high-speed CMOS, dy-
www.micronsemi.com/mti/msp/html/datasheet.html
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
1 5
1 6
32-Pin SOJ
PIN ASSIGNMENT (Top View)
3 2
3 1
3 0
2 9
2 8
2 7
2 6
2 5
2 4
2 3
2 2
2 1
2 0
1 9
1 8
1 7
ADDRESSING PACKAGE REFRESH
V
DQ7
DQ6
DQ5
DQ4
Vss
CAS#
OE#
NC /A12* *
A11
A10
A9
A8
A7
A6
V
SS
SS
REFRESH
4K
4K
4K
4K
8K
8K
8K
8K
RAS#
DQ0
DQ1
DQ2
DQ3
WE#
V
V
V
NC
A0
A1
A2
A3
A4
A5
CC
CC
CC
32-Pin TSOP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
EDO DRAM
8 MEG x 8
TSOP
TSOP
TSOP
TSOP
SOJ
SOJ
SOJ
SOJ
©2000, Micron Technology, Inc.
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Standard
Standard
Standard
Standard
V
DQ7
DQ6
DQ5
DQ4
V
CAS#
OE#
NC/A12* *
A11
A10
A9
A8
A7
A6
V
Self
Self
Self
Self
S S
S S
S S

Related parts for MT4LC8M8C2TG-5S

MT4LC8M8C2TG-5S Summary of contents

Page 1

... DJ 8 MEG x 8 EDO DRAM PART NUMBERS TG -5 PART NUMBER -6 MT4LC8M8C2DJ-x MT4LC8M8C2DJ-x S MT4LC8M8C2TG-x None MT4LC8M8C2TG MT4LC8M8P4DJ-x MT4LC8M8P4DJ-x S MT4LC8M8P4TG-x MT4LC8M8P4TG speed GENERAL DESCRIPTION The 8 Meg x 8 DRAM is a high-speed CMOS, dy- namic random-access memory devices containing 67,108,864 bits and designed to operate from ...

Page 2

WE# CAS# NO. 2 CLOCK GENERATOR COLUMN- ADDRESS 10 BUFFER(10) REFRESH CONTROLLER A0- A12 REFRESH COUNTER 13 ROW- ADDRESS 13 BUFFERS (13) NO. 1 CLOCK RAS# GENERATOR WE# CAS# NO. 2 CLOCK GENERATOR COLUMN- ADDRESS 11 BUFFER(11) REFRESH CONTROLLER A0- ...

Page 3

GENERAL DESCRIPTION (continued) uniquely addressed via the address bits. First, the row address is latched by the RAS# signal, then the column address is latched by CAS#. Both devices provide EDO- PAGE-MODE operation, allowing for fast successive data operations (READ, ...

Page 4

EDO PAGE MODE (continued) other cycles, the outputs are disabled at t RAS# and CAS# are HIGH or at WHZ after WE# transi- t tions LOW. The OFF time is referenced from the rising edge of RAS# or CAS#, whichever ...

Page 5

ABSOLUTE MAXIMUM RATINGS* Voltage on V Relative to V ................ -1V to +4. Voltage on NC, Inputs or I/O Pins Relative to V ....................................... -1V to +4.6V SS Operating Temperature, T (ambient) ... 0°C to +70°C A Storage ...

Page 6

I OPERATING CONDITIONS AND MAXIMUM LIMITS CC (Notes +3.3V ±0.3V) CC PARAMETER/CONDITION STANDBY CURRENT: TTL (RAS# = CAS STANDBY CURRENT: CMOS (RAS# = CAS 0.2V; DQs may ...

Page 7

CAPACITANCE (Note: 2) PARAMETER Input Capacitance: Address pins Input Capacitance: RAS#, CAS#, WE#, OE# Input/Output Capacitance ELECTRICAL CHARACTERISTICS (Notes 10, 11, 12 CHARACTERISTICS PARAMETER Access time from column address Column-address setup ...

Page 8

AC ELECTRICAL CHARACTERISTICS (Notes 10, 11, 12 CHARACTERISTICS PARAMETER OE# setup prior to RAS# during HIDDEN REFRESH cycle EDO-PAGE-MODE READ or WRITE cycle time EDO-PAGE-MODE READ-WRITE cycle time Access time from RAS# RAS# ...

Page 9

NOTES 1. All voltages referenced This parameter is sampled. V MHz 25° dependent on output loading and cycle CC rates. Specified values are obtained with mini- mum cycle time and ...

Page 10

V IH RAS CRP V CAS ASR V IH ROW ADDR WE OE TIMING PARAMETERS -5 SYMBOL MIN ...

Page 11

V IH RAS CRP CAS ASR V IH ADDR ROW IOH DQ V IOL TIMING PARAMETERS -5 SYMBOL MIN ...

Page 12

WRITE and READ-MODIFY-WRITE cycles RAS CRP V IH CAS ASR V IH ADDR V ROW WE IOH DQ V IOL ...

Page 13

V IH RAS CSH t CRP V CAS RAD t ASR t RAH V IH ADDR V ROW OPEN OE# ...

Page 14

EDO-PAGE-MODE EARLY WRITE CYCLE V IH RAS CSH t CRP V IH CAS RAD t ASR t RAH V IH ADDR ROW WCS ...

Page 15

WRITE and READ-MODIFY-WRITE cycles RAS CRP V IH CAS RAD t ASR t RAH V IH ADDR ROW WE RAC V IOH ...

Page 16

EDO-PAGE-MODE READ EARLY WRITE CYCLE V IH RAS CRP t RCD V IH CAS RAD t ASR t RAH V IH ADDR ROW WE IOH DQ OPEN ...

Page 17

V IH RAS CRP V CAS ASR V IH ADDR WE OE TIMING PARAMETERS -5 SYMBOL MIN MAX ...

Page 18

V IH RAS CRP V IH CAS ASR V IH ADDR RAS RPC CSR V IH CAS# ...

Page 19

V IH RAS CRP CAS ASR t RAH V IH ADDR ROW OE TIMING PARAMETERS -5 SYMBOL MIN MAX MIN t ...

Page 20

RAS RPC CSR V IH CAS WRP TIMING PARAMETERS -5 SYMBOL MIN MAX MIN t CHD 15 ...

Page 21

PIN #1 ID .050 (1.27) TYP .024 (0.61) .032 (0.82) .026 (0.67) SEATING PLANE NOTE: 1. All dimensions in inches (millimeters) MAX or typical where noted. 2. Package width and length do ...

Page 22

TYP PIN 1 ID +0.07 0.43 -0.13 NOTE: 1. All dimensions in millimeters MAX or typical where noted. 2. Package width and length do not include mold protrusion; allowable mold protrusion is .25mm per side. 8000 S. ...

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