T14L256A-8J Taiwan Semiconductor Company, Ltd. (TSC), T14L256A-8J Datasheet

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T14L256A-8J

Manufacturer Part Number
T14L256A-8J
Description
Manufacturer
Taiwan Semiconductor Company, Ltd. (TSC)
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
T14L256A-8J
Quantity:
72
tm
SRAM
FEATURES
PIN CONFIGURATION
Taiwan Memory Technology, Inc. reserves the right
to change products or specifications without notice.
VCC
A11
A13
WE
A14
A12
OE
A9
A8
A7
A6
A5
A4
A3
TSOP-I (forward type).
access
I/O1
I/O2
I/O3
High speed access time: 8/10/12/15ns(max.)
Low power consumption : Active 300 mW (typ.)
Single + 3.3 power supply
All inputs and outputs directly LVTTL compatible
Available packages :28-pin 300 mil, SOJ and
Common I/O capability
Output enable (
A14
A12
Vss
Fully static operation – No clock or refreshing
A7
A6
A5
A4
A3
A2
A1
A0
required
10
11
12
13
14
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
2
3
4
5
6
7
8
9
CH
TE
SOJ
OE
) available for very fast
TSOP-I
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Vcc
WE
A13
A8
A9
A11
OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
I/O8
I/O7
I/O6
I/O5
I/O4
VSS
I/O3
I/O2
I/O1
CS
A0
A1
A2
GENERAL DESCRIPTION
CMOS static RAM organized as 32,768 x 8 bits
that operates on a single 3.3-volt power supply.
This device is packaged in a standard 28-pin 300
mil SOJ or TSOP-I forward.
BLOCK DIAGRAM
PIN DESCRIPTION
PART NUMBER EXAMPLES
T14L256A-8J
T14L256A-8P
32K X 8 HIGH SPEED
CMOS STATIC RAM
A0 - A14
I/O1 - I/O8
Vcc
Vss
WE
OE
CS
P. 1
A 14
Vcc
A 0
WE
V
OE
CS
.
.
.
The T14L256A is a high speed, low power
SS
SYMBOL
DECODER
CONTROL
Publication Date: APR. 2001
TSOP-I
Address Inputs
Data Inputs/Outputs
Chip Select Inputs
Write Enable
Output Enable
Power Supply
Ground
SOJ
PACKAGE
DESCRIPTION
DATA I/O
ARRAY
CORE
T14L256A
8ns
8ns
Revision: E
SPEED
I/O 1
I/O 8
. .
.

Related parts for T14L256A-8J

T14L256A-8J Summary of contents

Page 1

... I/ Vcc 28 A10 Vss I/O8 25 I/O7 24 I/O6 23 I/O5 22 I/O4 PART NUMBER EXAMPLES 21 VSS 20 I/O3 19 I/O2 T14L256A- T14L256A- T14L256A CORE DECODER ARRAY I/O 1 CONTROL DATA I/O I/O 8 DESCRIPTION Address Inputs Data Inputs/Outputs Chip Select Inputs Write Enable Output Enable Power Supply Ground PACKAGE SPEED ...

Page 2

... 8.0mA 4.0mA I/O=0mA IL Cycle = MIN. Duty = 100 Cycle=MIN, Duty=100 -0. T14L256A UNIT MAX UNIT 3.3 Typ+5% - 0.8 - Vcc+0 I/O1- I/O8 Vcc I I High-Z SB1 SB, High-Z Icc Data Out Icc Data In Icc MIN. TYP. MAX. UNIT ...

Page 3

... =30pF 3.3V OUTPUT R2 350 ohm (For CLZ OLZ CHZ 90% 90% 10% 10% 3ns 3ns P. 3 T14L256A MAX. UNIT CONDITIONS = -4mA/8mA OL R1 320 ohm 5pF R2 Including 350 ohm Jig and Scope , OHZ WHZ OW Publication Date: APR. 2001 Revision: E ...

Page 4

... Write to Output in High Z Output Disable to Output in High Z Output Active from End of Write * These parameters are sampled but not 100% tested. Taiwan Memory Technology, Inc. reserves the right to change products or specifications without notice. T14L256A-8 T14L256A-10 T14L256A-12 T14L256A-1 SYM. MIN. MAX. MIN. MAX ...

Page 5

... T14L256A DON 'T CAR E UN DEF IN ED Publication Date: APR. 2001 Revision: E ...

Page 6

... Fixed T14L256A CAR INE D Publication Date: APR. 2001 Revision: E ...

Page 7

... OUT C 500 mV from steady state with is high during a controlled write cycle, this requirement does not T14L256A D during the write cycle 5pF. This parameter is L Publication Date: APR. 2001 Revision: E ...

Page 8

... N 0.268±0.003 O 0.300±0.002 P 0.053±0.001 Q 0.140±0.004 y 0.004(MAX) Taiwan Memory Technology, Inc. reserves the right to change products or specifications without notice. T14L256A DIMENSIONS IN MM 18.03±0.05 7.62±0.13 1.52±0.05 1.27±0.03 1.63±0.03 0.38±0.05 0.76±0.05 1.27±0.05 0.46±0.05 0.71±0.05 8.56±0.05 0.25± ...

Page 9

... DIMENSIONS IN INCHES 0.047(max.) 0.004 ± 0.002 0.039 ± 0.002 0.008(typ.) 0.006(typ.) 0.465 ± 0.004 0.315 ± 0.004 0.022(typ.) 0.528 ± 0.008 0.020 ± 0.004 0.0315 ± 0.004 0.004(max T14L256A Seating plane y A 0.010 L L1 DIMENSIONS IN MM 1.20(max.) 0.10 ± ...

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