MBM29F400TC-70PFTN SPANSION, MBM29F400TC-70PFTN Datasheet

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MBM29F400TC-70PFTN

Manufacturer Part Number
MBM29F400TC-70PFTN
Description
MBM29F400TC-70PFTNSPANSION [FLASH MEMORY CMOS 4M (512K x 8/256K x 16) BIT]
Manufacturer
SPANSION
Datasheet

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SPANSION Flash Memory
TM
Data Sheet
September 2003
TM
This document specifies SPANSION
memory products that are now offered by both Advanced Micro Devices and
Fujitsu. Although the document is marked with the name of the company that originally developed the specification,
these products will be offered to customers of both AMD and Fujitsu.
Continuity of Specifications
TM
There is no change to this datasheet as a result of offering the device as a SPANSION
product. Future routine
revisions will occur when appropriate, and changes will be noted in a revision summary.
Continuity of Ordering Part Numbers
AMD and Fujitsu continue to support existing part numbers beginning with "Am" and "MBM". To order these
products, please use only the Ordering Part Numbers listed in this document.
For More Information
TM
Please contact your local AMD or Fujitsu sales office for additional information about SPANSION
memory
solutions.

Related parts for MBM29F400TC-70PFTN

MBM29F400TC-70PFTN Summary of contents

Page 1

... Fujitsu. Although the document is marked with the name of the company that originally developed the specification, these products will be offered to customers of both AMD and Fujitsu. Continuity of Specifications There is no change to this datasheet as a result of offering the device as a SPANSION revisions will occur when appropriate, and changes will be noted in a revision summary. Continuity of Ordering Part Numbers AMD and Fujitsu continue to support existing part numbers beginning with " ...

Page 2

... MBM29F400TC DESCRIPTION The MBM29F400TC/ 4M-bit, 5.0 V-only Flash memory organized as 512K bytes of 8 bits each or 256K words of 16 bits each. The MBM29F400TC/BC is offered in a 48-pin TSOP and 44-pin SOP packages. This device is designed to be programmed in-system with the standard system 5 for write or erase operations ...

Page 3

... The MBM29F400TC/BC is pin and command set compatible with JEDEC standard. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine which controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations ...

Page 4

... MBM29F400TC FEATURES • Single 5.0 V read, write, and erase Minimizes system level power requirements • Compatible with JEDEC-standard commands Uses same software commands as E • Compatible with JEDEC-standard world-wide pinouts 48-pin TSOP (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type) 44-pin SOP (Package suffix: PF) • ...

Page 5

... FPT-48P-M19 A 24 (Marking Side N.C. 16 RY/BY 15 N.C. 14 N.C. 13 MBM29F400TC/MBM29F400BC RESET 12 Reverse Bend WE 11 N. FPT-48P-M20 4 /MBM29F400BC TSOP ( ...

Page 6

... MBM29F400TC PIN DESCRIPTION MBM29F400TC/BC Pin Configuration Pin name Address Inputs Data Inputs/Outputs Chip Enable OE Output Enable WE Write Enable RY/BY Ready-Busy Output RESET Hardware Reset Pin/Temporary Sector Unprotection BYTE Selects 8-bit or 16-bit mode N.C. No Internal Connection V Device Ground ...

Page 7

... MBM29F400TC -55/-70-90 BLOCK DIAGRAM RY/BY Buffer State Control BYTE RESET Command Register CE OE Low V Detector LOGIC SYMBOL 6 /MBM29F400BC RY/BY Erase Voltage Generator Program Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer for Address Program/Erase Latch X-Decoder ...

Page 8

... Reset (Hardware)/Standby Legend Manufacturer and device codes may also be accessed via a command register write sequence. Refer to “MBM29F400TC/BC Command Definitions” in DEVICE BUS OPERATION Refer to the section on Sector Protection can /MBM29F400BC -55/-70-90 ...

Page 9

... X = “H” or “L” for all address commands except or Program Address (PA) and 15 11 Sector Address (SA). Bus operations are defined in “MBM29F400TC/BC User Bus Operation (BYTE = V “MBM29F400TC/BC User Bus Operation (BYTE = Address of the memory location to be read Address of the memory location to be programmed. Addresses are latched on the falling edge of the WE pulse ...

Page 10

... MBM29F400TC MBM29F400TC/BC Sector Protection Verify Autoselect Codes Type Manufacturer’s Code Byte MBM29F400TC Word Device Code Byte MBM29F400BC Word Sector Protection * for Byte mode. -1 *2: Outputs 01h at protected sector addresses and outputs 00h at unprotected sector addresses. Type Code DQ Manufacturer’s Code ...

Page 11

... Individual-sector, multiple-sector, or bulk-erase capability. • Individual or multiple-sector protection is user definable. 16K byte 8K byte 8K byte 32K byte 64K byte 64K byte 64K byte 64K byte 64K byte 64K byte 64K byte MBM29F400TC Sector Architecture 10 /MBM29F400BC -55/-70- 16) 7FFFFh 3FFFFh 7BFFFh 3DFFFh 79FFFh 3CFFFh 77FFFh ...

Page 12

... MBM29F400TC Sector Address Table (MBM29F400TC) Sector Address SA0 0 0 SA1 0 0 SA2 0 1 SA3 0 1 SA4 1 0 SA5 1 0 SA6 1 1 SA7 1 1 SA8 1 1 SA9 1 1 SA10 1 1 Sector Address Table (MBM29F400BC) Sector Address SA0 0 0 SA1 ...

Page 13

... IL = 23h and MBM29F400BC = ABh for 8 mode; MBM29F400TC = 2223h and MBM29F400BC = 22ABh for 16 mode). These two bytes/words are given in “MBM29F400TC/BC Sector Protection Verify Autoselect Codes” and “Expanded Autoselect Code Table” in DEVICE BUS OPERATION. All identifiers for manufacturer and device ...

Page 14

... Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing parameters. Sector Protection The MBM29F400TC/BC features hardware sector protection. This feature will disable both program and erase operations in any number of sectors (0 through 10). The sector protection feature is enabled using programming equipment at the user’s site. The device is shipped with all sectors unprotected. ...

Page 15

... The operation is initiated by writing the autoselect command sequence into the command register. Following the command write, a read cycle from address XX00h retrieves the manufacture code of 04h. A read cycle from address XX01h for 16 (XX02h for 8) returns the device code (MBM29F400TC = 23h and MBM29F400BC = ABh for 8 mode; MBM29F400TC = 2223h and MBM29F400BC = 22ABh for 16 mode). ...

Page 16

... WE. After time-out of 50 µs from the rising edge of the last sector erase command, the sector erase operation will begin. Multiple sectors may be erased concurrently by writing the six bus cycle operations on “MBM29F400TC/BC Command Definitions” in DEVICE BUS OPERATION. This sequence is followed with writes of the Sector Erase command to addresses in other sectors desired to be concurrently erased. The time between writes must be less than 50 µ ...

Page 17

... MBM29F400TC “Embedded Erase Algorithm” in FLOW CHART illustrates the Embedded Erase Algorithm using typical command strings and bus operations. Erase Suspend The Erase Suspend command allows the user to interrupt a Sector Erase operation and then perform data reads from or programs to a sector not being erased. This command is applicable ONLY during the Sector Erase operation which includes the time-out period for sector erase ...

Page 18

... DQ 7 Data Polling The MBM29F400TC/BC device feature Data Polling as a method to indicate to the host that the Embedded Algorithms are in progress or completed. During the Embedded Program Algorithm an attempt to read the device will produce the complement of the data last written to DQ Algorithm, an attempt to read the device will produce the true data last written to DQ Erase Algorithm, an attempt to read the device will produce a “ ...

Page 19

... DQ 6 Toggle Bit I The MBM29F400TC/BC also feature the “Toggle Bit I” method to indicate to the host system that the Embedded Algorithms are in progress or completed. During an Embedded Program or Erase Algorithm cycle, successive attempts to read (OE toggling) data from the device will result in DQ toggling between one and zero ...

Page 20

... When the RY/BY pin is low, the device will not accept any additional program or erase commands. If the MBM29F400TC/BC is placed in an Erase Suspend mode, the RY/BY output will be high. Also, since this is an open drain output, many RY/BY pins can be tied together in parallel with a pull up resistor to V During programming, the RY/BY pin is driven low after the rising edge of the fourth write pulse ...

Page 21

... If hardware reset occurs during Embedded Erase Algorithm, there is a possibility that the erasing sector(s) cannot be used. Byte/Word Configuration The BYTE pin selects the byte (8-bit) mode or word (16-bit) mode for the MBM29F400TC/BC device. When this pin is driven high, the device operates in the word (16-bit) mode. The data is read and programmed ...

Page 22

... FUJITSU representatives beforehand. /MBM29F400BC -55/-70-90 Symbol Min Tstg –55 T – –2.0 IN OUT V –2 –2.0 IN +2.0 V for periods ns. CC Conditions MBM29F400TC/BC-55 MBM29F400TC/BC-70/-90 -55/-70-90 Rating Unit Max +125 °C +85 °C +7.0 V +7.0 V +13 +0.5 V. During voltage CC , OE, RESET pins 9 , OE, RESET pins 9 Value Unit ...

Page 23

... MBM29F400TC MAXIMUM OVERSHOOT/MAXIMUM UNDERSHOOT +0.8 V –0.5 V – +2.0 V +14.0 V +13 +0 Note: This waveform is applied for A 22 /MBM29F400BC -55/-70- Maximum Undershoot Waveform Maximum Overshoot Waveform OE, and RESET. 9 Maximum Overshoot Waveform -55/-70- ...

Page 24

... MBM29F400TC DC CHARACTERISTICS Parameter Input Leakage Current Output Leakage Current A , OE, RESET Inputs Leakage 9 Current V Active Current Active Current Current (Standby Current (Standby, Reset) CC Input Low Level Input High Level Voltage for Autoselect and Sector Protection (A , OE, RESET ...

Page 25

... Input rise and fall times Input pulse levels: 0 3.0 V Timing measurement reference level Input: 1.5 V Output: 1.5 V Device Under Test Notes including jig capacitance (MBM29F400TC/BC-55 100 pF including jig capacitance (MBM29F400TC/BC-70/90 /MBM29F400BC -55/-70-90 Symbol Test Setup JEDEC Min Max Min Max Min Max Standard t t — ...

Page 26

... MBM29F400TC • Write/Erase/Program Operations Parameter Write Cycle Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time Output Read Enable Hold Toggle and Data Polling Time Read Recover Time Before Write Read Recover Time Before Write ...

Page 27

... MBM29F400TC (Continued) Parameter BYTE Switching Low to Output High-Z BYTE Switching High to Output Active Program/Erase Valid to RY/BY Delay Delay Time from Embedded Output Enable *1 : This does not include the preprogramming time These timing is for Sector Protection operation. 26 /MBM29F400BC -55/-70-90 Symbol -55 JEDEC Standard Min Typ Max Min — ...

Page 28

... MBM29F400TC TIMING DIAGRAM • Key to Switching Waveforms WAVEFORM Address OEH WE High-Z Outputs AC Waveforms for Read Operations /MBM29F400BC -55/-70-90 INPUTS OUTPUTS Must Be Will Be Steady Steady May Will Be Change Changing from from May Will Be Change Changing from from “H” or “L” ...

Page 29

... MBM29F400TC 3rd Bus Cycle Address 555h A0h Data t DS 5.0 V Notes address of the memory location to be programmed PD is data to be programmed at byte address the output of the complement of the data written to the device the output of the data written to the device. ...

Page 30

... MBM29F400TC -55/-70-90 3rd Bus Cycle Address 555h GHEL CPH t WS A0h Data t DS 5.0 V Notes address of the memory location to be programmed data to be programmed at byte address the output of the complement of the data written to the device. ...

Page 31

... MBM29F400TC Address CE t GHWL Data VCS Notes the sector address for Sector Erase. Addresses = 555h (Word), AAAh (Byte) for Chip Erase. These waveforms are for the AC Waveforms Chip/Sector Erase Operations 30 /MBM29F400BC -55/-70- 555h 2AAh 555h t AS ...

Page 32

... MBM29F400TC -55/-70- OEH WE DQ Data 7 Data Valid Data (The device has completed the Embedded operation Waveforms for Data Polling during Embedded Algorithm Operations CE t OEH WE t OES OE Data Toggle stops toggling (The device has completed the Embedded operation). ...

Page 33

... MBM29F400TC CE WE RY/BY RY/BY Timing Diagram during Program/Erase Operations WE RESET RY/BY 32 /MBM29F400BC -55/-70-90 Rising edge of the last WE signal READY RESET/RY/BY Timing Diagram -55/-70-90 Entire programming or erase operations t BUSY t RB ...

Page 34

... MBM29F400TC CE BYTE ELFH Timing Diagram for Word Mode Configuration CE BYTE t ELFL Timing Diagram for Byte Mode Configuration BYTE BYTE Timing Diagram for Write Operations /MBM29F400BC -55/-70-90 Data Output Data Output ( (DQ ...

Page 35

... MBM29F400TC SAX VLHT VLHT WE CE Data t VLHT V CC SAX = Sector Address for initial sector SAY = Sector Address for next sector Note byte mode ...

Page 36

... MBM29F400TC VIDR t VCS RESET CE WE RY/BY Temporary Sector Unprotection Timing Diagram Enter Erase Embedded Suspend Erasing WE Erase Erase Suspend Read Toggle DQ and with read from the erase-suspended sector. 2 /MBM29F400BC -55/-70-90 t Program or Erase Command Sequence VLHT ...

Page 37

... MBM29F400TC FLOW CHART EMBEDDED ALGORITHMS Increment Address *: The sequence is applied for The addresses differ from 36 /MBM29F400BC -55/-70-90 Start Write Program Command Sequence (See Below) Data Polling Device No Last Address ? Yes Programming Completed Program Command Sequence* (Address/Command): 555h/AAh 2AAh/55h 555h/A0h Program Address/Program Data 16 mode ...

Page 38

... MBM29F400TC EMBEDDED ALGORITHMS Chip Erase Command Sequence* (Address/Command): 555h/AAh 2AAh/55h 555h/80h 555h/AAh 2AAh/55h 555h/10h *: The sequence is applied for The addresses differ from 8 mode. /MBM29F400BC -55/-70-90 Start Write Erase Command Sequece (See Below) Data Polling or Toggle Bit Successfully Completed Erasure Completed Individual Sector/Multiple Sector* ...

Page 39

... MBM29F400TC Note rechecked even /MBM29F400BC -55/-70-90 Start Read Byte ( Addr Yes DQ = Data Yes Read Byte ( Addr Yes DQ = Data Pass Fail = “1” because DQ may change simultaneously with Data Polling Algorithm ...

Page 40

... MBM29F400TC -55/-70-90 Read DQ Addr. Read DQ Addr Read DQ Addr. Read DQ Addr. Program/Erase Operation Not Complete.Write Reset Command *1 : Read toggle bit twice to determine whether it is toggling Recheck toggle bit because it may stop toggling as DQ /MBM29F400BC Start VA Bank address being executed Embedded Algorithm. ...

Page 41

... MBM29F400TC Increment PLSCNT PLSCNT = 25? Remove V Write Reset Command Device Failed *: byte mode /MBM29F400BC -55/-70-90 Start Setup Sector Addr 16, 15 PLSCNT = Activate WE Pulse Time out 100 should remain V 9 Read from Sector (Addr ...

Page 42

... MBM29F400TC -55/-70-90 *1: All protected sectors unprotected. *2: All previously protected sectors are protected once again. Temporary Sector Unprotection Algorithm /MBM29F400BC Start RESET = Perform Erase or Program Operations RESET = V IH Temporary Sector Unprotection Completed* 2 -55/-70-90 41 ...

Page 43

... MBM29F400TC ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Word Programming Time Byte Programming Time Chip Programming Time Erase/Program Cycle 100,000 TSOP (1) PIN CAPACITANCE Parameter Input Capacitance Output Capacitance Control Pin Capacitance Notes : Test conditions T = +25° 1.0 MHz pin capacitance is stipulated by output capacitance. ...

Page 44

... MBM29F400TC ORDERING INFORMATION Standard Products Fujitsu standard products are available in several packages. The order number is formed by a combination of: MBM29F400 T C -55 DEVICE NUMBER/DESCRIPTION MBM29F400 4Mega-bit (512K 5.0 V-only Read, Write, and Erase /MBM29F400BC -55/-70-90 PFTN PACKAGE TYPE PFTN = 48-Pin Thin Small Outline Package (TSOP (1)) Standard Pinout ...

Page 45

... MBM29F400TC PACKAGE DIMENSIONS 48-pin plastic TSOP (1) (FPT-48P-M19) LEAD No. 1 INDEX 24 20.00 (.787 * 18.40 (.724 "A" 0.10(.004) 2003 FUJITSU LIMITED F48029S-c-6 /MBM29F400BC -55/-70-90 Note Values do not include resin protrusion. Resin protrusion and gate protrusion are +0.15(.006)Max(each side). Note 2) Pins width and pins thickness include plating thickness. ...

Page 46

... MBM29F400TC 48-pin plastic TSOP (1) (FPT-48P-M20) LEAD No. 1 INDEX 24 0.10(.004) "A" * 18.40 ± 0.20 (.724 ± .008) 20.00 ± 0.20 (.787 ± .008) 2003 FUJITSU LIMITED F48030S-c-6-7 C /MBM29F400BC -55/-70-90 Note Values do not include resin protrusion. Resin protrusion and gate protrusion are +0.15(.006)Max(each side). Note 2) Pins width and pins thickness include plating thickness. ...

Page 47

... MBM29F400TC (Continued) 44-pin plastic SOP (FPT-44P-M16) +0. 28.45 1.120 –0.20 44 INDEX 1 1.27(.050) 0.42 .017 0.10(.004) 2002 FUJITSU LIMITED F44023S-c-6 /MBM29F400BC -55/-70-90 Note These dimensions include resin protrusion. Note These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. ...

Page 48

... MBM29F400TC -55/-70-90 FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of Fujitsu semiconductor device ...

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