S29GL256N11FFI010 SPANSION, S29GL256N11FFI010 Datasheet

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S29GL256N11FFI010

Manufacturer Part Number
S29GL256N11FFI010
Description
Manufacturer
SPANSION
Datasheet
Data Sheet
S29GL-N
MirrorBit™ Flash Family
S29GL512N, S29GL256N, S29GL128N
512 Megabit, 256 Megabit, and 128 Megabit,
3.0 Volt-only Page Mode Flash Memory featuring
110 nm MirrorBit™ Process Technology
Notice to Readers: This document states the current technical specifications
regarding the Spansion product(s) described herein. Spansion Inc. deems the
products to have been in sufficient production volume such that subsequent
versions of this document are not expected to change. However, typographical
or specification corrections, or modifications to the valid combinations offered
may occur.
Publication Number S29GL-N_00
Revision B
Amendment 3
Issue Date October 13, 2006

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S29GL256N11FFI010 Summary of contents

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... MirrorBit™ Process Technology Data Sheet Notice to Readers: This document states the current technical specifications regarding the Spansion product(s) described herein. Spansion Inc. deems the products to have been in sufficient production volume such that subsequent versions of this document are not expected to change. However, typographical or specification corrections, or modifications to the valid combinations offered may occur ...

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... Spansion Inc. applies the following conditions to documents in this category: “This document states the current technical specifications regarding the Spansion product(s) described herein. Spansion Inc. deems the products to have been in sufficient production volume such that sub- sequent versions of this document are not expected to change. However, typographical or specification corrections, or modifications to the valid combinations offered may occur.” ...

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S29GL-N MirrorBit™ Flash Family S29GL512N, S29GL256N, S29GL128N 512 Megabit, 256 Megabit, and 128 Megabit, 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit™ Process Technology Data Sheet Distinctive Characteristics Architectural Advantages Single power supply operation — 3 volt read, ...

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General Description The S29GL512/256/128N family of devices are 3.0V single power flash memory manufac- tured using 110 nm MirrorBit technology. The S29GL512N is a 512 Mbit, organized as 33,554,432 words or 67,108,864 bytes. The S29GL256N is a 256 Mbit, organized ...

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The device reduces power consumption in the standby mode when it detects specific voltage levels on CE# and RESET#, or when addresses have been stable for a specified period of time. The Secured Silicon Sector provides a 128-word/256-byte area for ...

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Table of Contents Notice On Data Sheet Designations . . . . . . . . . . . ii — Product Availability Table .................................................. 1 Product Selector Guide . . . . . . . . . . . ...

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Read-Only Operations ......................................................................................77 Figure 11. Read Operation Timings ....................................... 78 Figure 12. Page Read Timings .............................................. 78 Hardware Reset (RESET#) ...............................................................................79 Figure 13. Reset Timings..................................................... 79 Erase and Program Operations ..................................................................... 80 Figure 14. Program Operation Timings .................................. 81 Figure ...

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Product Selector Guide S29GL512N Part Number Speed Option V = 2.7–3 Max. Access Time (ns) Max. CE# Access Time (ns) Max. Page access time (ns) Max. OE# Access Time (ns) S29GL256N, S29GL128N Part Number V = 2.7–3.6 V ...

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Block Diagram RY/BY RESET# WE# State WP#/ACC Control BYTE# Command Register CE# OE# V Detector CC A **–A0 Max ** A GL512N = A24, A Max S29GL-N_00_B3 October 13, 2006 ...

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Connection Diagrams NC for S29GL128N A23 1 A22 2 A15 3 A14 4 A13 5 A12 6 A11 7 A10 A19 11 A20 12 WE# 13 RESET# 14 A21 15 WP#/ACC 16 RY/BY# 17 A18 ...

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Connection Diagrams A22 A7 B7 A13 A12 WE# RESET RY/BY# WP#/ACC A17 Notes: 1. Ball ...

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Pin Description A24–A0 A23–A0 A22–A0 DQ14–DQ0 DQ15/A-1 CE# OE# WE# WP#/ACC RESET# BYTE# RY/BY Address inputs (512 Mb Address ...

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Logic Symbol S29GL-N_00_B3 October 13, 2006 S29GL512N A24– DQ15–DQ0 CE# (A-1) OE# WE# WP#/ACC RESET# V RY/BY# IO BYTE# S29GL256N A23– DQ15–DQ0 ...

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Ordering Information The ordering part number is formed by a valid combination of the following: S29GL512N DEVICE NUMBER/DESCRIPTION S29GL128N, S29GL256N, S29GL512N 3.0 Volt-only, 512 Megabit ( 16-Bit/ 8-Bit) Page-Mode Flash Memory Manufactured ...

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Device Bus Operations This section describes the requirements and use of the device bus operations, which are ini- tiated through the internal command register. The command register itself does not occupy any addressable memory location. The register is a latch ...

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Requirements for Reading Array Data To read array data from the outputs, the system must drive the CE# and OE# pins to V CE# is the power control and selects the device. OE# is the output control and gates array ...

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If the system asserts V lock Bypass mode, temporarily unprotects any protected sector groups, and uses the higher voltage on the pin to reduce the time required for program operations. The system would use a two-cycle program command sequence as ...

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Output Disable Mode When the OE# input the high impedance state. Table 2. Sector Address Table–S29GL512N (Sheet 1 of 12) Sector A24–A16 SA0 SA1 SA2 0 ...

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Table 2. Sector Address Table–S29GL512N (Sheet 2 of 12) Sector A24–A16 SA39 SA40 SA41 SA42 SA43 ...

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Table 2. Sector Address Table–S29GL512N (Sheet 3 of 12) Sector A24–A16 SA83 SA84 SA85 SA86 SA87 ...

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Table 2. Sector Address Table–S29GL512N (Sheet 4 of 12) Sector A24–A16 SA127 SA128 SA129 SA130 SA131 ...

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Table 2. Sector Address Table–S29GL512N (Sheet 5 of 12) Sector A24–A16 SA171 SA172 SA173 SA174 SA175 ...

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Table 2. Sector Address Table–S29GL512N (Sheet 6 of 12) Sector A24–A16 SA215 SA216 SA217 SA218 SA219 ...

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Table 2. Sector Address Table–S29GL512N (Sheet 7 of 12) Sector A24–A16 SA259 SA260 SA261 SA262 SA263 ...

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Table 2. Sector Address Table–S29GL512N (Sheet 8 of 12) Sector A24–A16 SA303 SA304 SA305 SA306 SA307 ...

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Table 2. Sector Address Table–S29GL512N (Sheet 9 of 12) Sector A24–A16 SA347 SA348 SA349 SA350 SA351 ...

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Table 2. Sector Address Table–S29GL512N (Sheet 10 of 12) Sector A24–A16 SA391 SA392 SA393 SA394 SA395 ...

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Table 2. Sector Address Table–S29GL512N (Sheet 11 of 12) Sector A24–A16 SA435 SA436 SA437 SA438 SA439 ...

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Table 2. Sector Address Table–S29GL512N (Sheet 12 of 12) Sector A24–A16 SA479 SA480 SA481 SA482 SA483 ...

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Table 3. Sector Address Table–S29GL256N (Sheet Sector A23–A16 SA0 SA1 SA2 SA3 SA4 ...

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Table 3. Sector Address Table–S29GL256N (Sheet Sector A23–A16 SA43 SA44 SA45 SA46 SA47 ...

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Table 3. Sector Address Table–S29GL256N (Sheet Sector A23–A16 SA87 SA88 SA89 SA90 SA91 ...

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Table 3. Sector Address Table–S29GL256N (Sheet Sector A23–A16 SA131 SA132 SA133 SA134 SA135 ...

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Table 3. Sector Address Table–S29GL256N (Sheet Sector A23–A16 SA175 SA176 SA177 SA178 SA179 ...

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Table 3. Sector Address Table–S29GL256N (Sheet Sector A23–A16 SA219 SA220 SA221 SA222 SA223 ...

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Table 4. Sector Address Table–S29GL128N (Sheet Sector A22–A16 SA0 SA1 SA2 SA3 SA4 SA5 ...

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Table 4. Sector Address Table–S29GL128N (Sheet Sector A22–A16 SA43 SA44 SA45 SA46 SA47 SA48 ...

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Table 4. Sector Address Table–S29GL128N (Sheet Sector A22–A16 SA87 SA88 SA89 SA90 SA91 SA92 ...

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... To access the autoselect codes in-system, the host system can issue the autoselect command via the command register, as shown in method does not require V 51 for more information. Table 5. Autoselect Codes (High Voltage Method) Description CE# OE# WE# Manufacturer ID Spansion Product Cycle 1 Cycle Cycle 3 Cycle 1 Cycle Cycle 3 Cycle 1 ...

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Sector Protection The device features several levels of sector protection, which can disable both the program and erase operations in certain sectors or sector groups: Persistent Sector Protection A command sector protection method that replaces the old 12 V controlled ...

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Lock Register The Lock Register consists of 3 bits (DQ2, DQ1, and DQ0). These DQ2, DQ1, DQ0 bits of the Lock Register are programmable by the user. Users are not allowed to program both DQ2 and DQ1 bits of the ...

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They are called dynamic states because it is very easy to switch back and forth be- tween the protected and un-protected conditions. This allows software to easily protect sectors against inadvertent changes yet does not prevent the easy removal ...

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Persistent Protection Bit Lock (PPB Lock Bit) A global volatile bit. When set to the “freeze state”, the PPB bits cannot be changed. When cleared to the “unfreeze state”, the PPB bits are changeable. There is only one PPB Lock ...

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Password Sector Protection The Password Sector Protection method allows an even higher level of security than the Per- sistent Sector Protection method. There are two main differences between the Persistent Sector Protection and the Password Sector Protection methods: When the ...

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Password The 64-bit Password is located in its own memory space and is accessible through the use of the Password Program and Password Read commands. The password function works in con- junction with the Password Protection Mode Lock Bit, ...

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This mode of operation continues until the system issues the Exit Se- cured Silicon Sector command sequence, or until power is removed from the device. On power-up, or following a hardware reset, the device reverts to ...

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Hardware Data Protection The command sequence requirement of unlock cycles for programming or erasing provides data protection against inadvertent writes (refer to page 65 for command definitions). In addition, the following hardware data protection mea- sures prevent accidental erasure or ...

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Common Flash Memory Interface (CFI) The Common Flash Interface (CFI) specification outlines device and host system software in- terrogation handshake, which allows specific vendor-specified software algorithms to be used for entire families of devices. Software support can then be device-independent, ...

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Addresses (x16) Addresses (x8) 1Bh 36h 1Ch 38h 1Dh 3Ah 1Eh 3Ch 1Fh 3Eh 20h 40h 21h 42h 22h 44h 23h 46h 24h 48h 25h 4Ah 26h 4Ch S29GL-N_00_B3 October 13, 2006 ...

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Addresses (x16) Addresses (x8) 27h 4Eh 28h 50h 29h 52h 2Ah 54h 2Bh 56h 2Ch 58h 2Dh 5Ah 2Eh 5Ch 2Fh 5Eh 30h 60h 31h 62h 32h 64h 33h 66h 34h 68h 35h 6Ah 36h 6Ch 37h 6Eh 38h 70h ...

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Table 11. Primary Vendor-Specific Extended Query Addresses (x16) Addresses (x8) 40h 80h 41h 82h 42h 84h 43h 86h 44h 88h 45h 8Ah 46h 8Ch 47h 8Eh 48h 90h 49h 92h 4Ah 94h 4Bh 96h 4Ch 98h 4Dh 9Ah 4Eh 9Ch ...

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Command Definitions Writing specific address and data commands or sequences into the command register initiates device operations. command sequences. Writing incorrect address and data values or writing them in the im- proper sequence may place the device in an unknown ...

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Autoselect Command Sequence The autoselect command sequence allows the host system to access the manufacturer and device codes, and determine whether or not a sector is protected. Table 14 on page 65 to that shown in Table 5 on page ...

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Word programming is supported for backward compatibility with existing Flash driver software and for occasional writing of individual words. Use of Write Buffer Programming is strongly recommended for general programming use when more than a ...

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Once the specified number of write buffer locations have been loaded, the system must then write the Program Buffer to Flash command at the sector address. Any other address and data combination aborts the Write Buffer Programming operation. gramming. Data ...

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Write “Write to Buffer” command and Sector Address Write number of addresses to program minus 1(WC) and Sector Address Write first address/data Yes Abort Write to Buffer Operation? (Note 1) Write next address/data pair Write ...

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Increment Address Note: page 65 Program Suspend/Program Resume Command Sequence The Program Suspend command allows the system to interrupt a programming operation or a Write to Buffer programming operation so that data can be read from any non-suspended sector. When ...

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See information. The system must write the Program Resume command (address bits are don’t care) to exit the Program Suspend mode and continue the programming operation. Further writes of the Resume command are ignored. ...

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If that occurs, the chip erase command sequence should be reinitiated once the device has returned to reading array data, to ensure data integrity. Figure 4, on page 58 Silicon Sector, autoselect, and CFI functions are unavailable when an ...

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Notes: Erase Suspend/Erase Resume Commands The Erase Suspend command, B0h, allows the system to interrupt a sector erase operation and then read data from, or program data to, any sector not selected for erasure. This com- mand is valid only ...

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In the erase-suspend-read mode, the system can also issue the autoselect command se- quence. Refer to the Sequence‚ on page 51 To resume the sector erase operation, the system must write the Erase Resume command. The address of the erase-suspended ...

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Once the Password is written and verified, the Password Protection Mode Lock Bit in the Lock Register must be programmed in order to prevent verification. The Password Program com- mand is only capable of programming 0s. Programming a 1 after ...

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The PPB Program command is used to program, or set, a given PPB bit. Each PPB bit is indi- vidually programmed (but is bulk erased with the other PPB bits). The specific sector address (A24-A16 for S29GL512N, A23-A16 for S29GL256N, ...

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Volatile Sector Protection Command Set The Volatile Sector Protection Command Set permits the user to set the Dynamic Protection Bit (DYB) to the protected state, clear the Dynamic Protection Bit (DYB) to the unprotected state, and read the logic state ...

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Command Definitions Table 12. Command Sequence (Notes) Asynchronous Read (6) 1 Reset (7) 1 Manufacturer ID 4 Device ID (8) 6 Sector Protect Verify (9) 4 Secure Device Verify (10) 4 CFI Query (11) 1 Program 4 Write to Buffer ...

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Table 13. Sector Protection Commands (x16) Command Sequence (Notes) Command Set Entry (5) 3 Lock Program (6) 2 Register Read (6) 1 Bits Command Set Exit (7) 2 Command Set Entry (5) 3 Program (8) 2 Password Read (9) 4 ...

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Command Sequence (Notes) Asynchronous Read (6) 1 Reset (7) 1 Manufacturer ID 4 Device ID (8) 6 Sector Protect Verify (9) 4 Secure Device Verify (10) 4 CFI Query (11) 1 Program 4 Write to Buffer (12) 6 Program Buffer ...

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Table 15. Sector Protection Commands (x8) Command Sequence (Notes) Command Set Entry (5) 3 Lock Program (6) 2 Register Read (6) 1 Bits Command Set Exit (7) 2 Command Set Entry (5) 3 Program (8) 2 Read (9) 8 Password ...

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Write Operation Status The device provides several bits to determine the status of a program or erase operation: DQ2, DQ3, DQ5, DQ6, and DQ7. the function of these bits. DQ7 and DQ6 each offer a method for determining whether a ...

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Notes Valid address for programming. During a sector erase operation, a valid address is any sector address within the sector being erased. During chip erase, a valid address is any non-protected sector address. 2. DQ7 should be ...

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DQ6: Toggle Bit I Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete, or whether the device has entered the Erase Suspend mode. Toggle Bit I may be read at any ...

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The system should recheck the toggle bit even if DQ5 = 1 because the toggle bit may stop toggling as DQ5 changes to 1. See the subsections on DQ6 and DQ2 for more information. 70 ...

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DQ2: Toggle Bit II The Toggle Bit II on DQ2, when used with DQ6, indicates whether a particular sector is ac- tively erasing (that is, the Embedded Erase algorithm is in progress), or whether that sector is erase-suspended. Toggle Bit ...

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DQ3: Sector Erase Timer After writing a sector erase command sequence, the system may read DQ3 to determine whether or not erasure has begun. (The sector erase timer does not apply to the chip erase command.) If additional sectors are ...

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Absolute Maximum Ratings Storage Temperature, Plastic Packages . . . . . . . . . . . . . . . . –65°C to +150°C Ambient Temperature with Power Applied . . . . . . . . . ...

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DC Characteristics CMOS Compatible Parameter Parameter Description Symbol (Notes) I Input Load Current ( Input Load Current LIT I Output Leakage Current Active Read Current (1) CC1 Intra-Page Read Current (1) ...

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Test Conditions Note: Diodes are IN3064 or equivalent Output Load Output Load Capacitance, C (including jig capacitance) Input Rise and Fall Times Input Pulse Levels Input timing measurement reference levels (See Note) Output timing measurement reference levels Note ...

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Key to Switching Waveforms Waveform Don’t Care, Any Change Permitted V IO 0.5 V Input IO 0.0 V Note < the input measurement reference level is 0 ...

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AC Characteristics Read-Only Operations Parameter Description JEDEC Std Read Cycle Time AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV CE t Page Access Time PACC t t Output ...

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AC Characteristics Addresses CE# OE# WE# Outputs RESET# RY/BY Amax-A2 A2-A0* Data Bus CE# OE# * Figure shows word mode. Addresses are A2–A-1 for byte mode ...

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AC Characteristics Hardware Reset (RESET#) Parameter JEDEC Std. RESET# Pin Low (During Embedded Algorithms) t Ready to Read Mode RESET# Pin Low (NOT During Embedded t Ready Algorithms) to Read Mode t RESET# Pulse Width RP t Reset High Time ...

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AC Characteristics Erase and Program Operations Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL AS Address Setup Time to OE# low during toggle bit t ASO polling t t ...

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AC Characteristics Program Command Sequence (last two cycles Addresses 555h CE# OE# WE Data RY/BY VCS Notes program address program data Illustration shows device in word ...

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AC Characteristics Erase Command Sequence (last two cycles Addresses 2AAh CE Data RY/BY# t VCS V CC Notes sector address (for Sector Erase Valid Address ...

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AC Characteristics t Addresses VA t ACC OE# t OEH WE# DQ7 DQ6–DQ0 t BUSY RY/BY# Note Valid address. Illustration shows first status cycle after command sequence, last status read cycle, ...

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AC Characteristics Addresses CE# t OEH WE# OE Valid Data DQ2 and DQ6 RY/BY# Note Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last status read cycle, and array ...

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AC Characteristics Alternate CE# Controlled Erase and Program Operations- S29GL128N, S29GL256N, S29GL512N Parameter JEDEC Std Write Cycle Time (Note 1) AVAV Address Setup Time AVWL AS Address Setup Time to OE# low during toggle bit ...

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AC Characteristics 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes: 1. Figure indicates last two bus cycles of a program or erase operation ...

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Erase And Programming Performance Parameter Sector Erase Time S29GL128N Chip Erase Time S29GL256N S29GL512N Total Write Buffer Programming Time (Note 3) Total Accelerated Effective Write Buffer Programming Time (Note 3) S29GL128N Chip Program Time S29GL256N (Note 4) S29GL512N Notes: 1. ...

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Physical Dimensions TS056—56-Pin Standard Thin Small Outline Package (TSOP) PACKAGE TS 56 JEDEC MO-142 (B) EC SYMBOL MIN. NOM. MAX. A --- --- 1.20 A1 0.05 --- 0.15 A2 0.95 1.00 1.05 b1 0.17 0.20 0.23 b 0.17 0.22 0.27 ...

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Physical Dimensions LAA064—64-Ball Fortified Ball Grid Array (FBGA) S29GL-N_00_B3 October 13, 2006 DIRECTION S29GL-N MirrorBit™ Flash Family 89 ...

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Advance Information on S29GL-P Hardware Reset (RESET#) and Power-up Sequence Parameter JEDEC Std. RESET# Pin Low (During Embedded Algorithms) t Ready to Read Mode or Write mode RESET# Pin Low (NOT During Embedded t Ready Algorithms) to Read Mode or ...

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Parameter Reset Low Time from Rising Edge VCS of RESET# Reset Low Time from Rising Edge VIOS of RESET# t Reset High Time Before Read RH Notes < 200 mV. ...

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Revision Summary Revision A (September 2, 2003) Initial Release. Revision A1 (October 16, 2003) Global Added LAA064 package. Distinctive Characteristics, Performance Characteristics Clarified fifth bullet information. Added RTSOP to Package Options. Distinctive Characteristics, Software and Hardware Features Clarified Password Sector ...

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Revision A2 (January 22, 2004) Lock Register Corrected and added new text for Secured Silicon Sector Protection Bit, Persistent Protection Mode Lock Bit, and Password Protection Mode Lock Bit. Persistent Sector Protection Persistent Protection Bit (PPB): Added the second paragraph ...

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Revision A4 (May 13, 2004) Global Removed references to RTSOP. Distinctive Characteristics Removed 16-word/32-byte page read buffer from Performance Characteristics. Changed Low power consumption typical active read current and removed 10 mA typical intrapage active read current. ...

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Figure 11, “Read Operation Timings,” Added t to figure. CEH Figure 12, “Page Read Timings,” Change A1-A0 to A2-A0. Erase and Program Operations Updated t and t WHWH1 Figure 16, “Chip/Sector Erase Operation Timings,” Changed 5555h to 55h and 3030h ...

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Alternate CE# Controlled Erase and Program Operations Created a family table. Erase and Programming Performance Created a family table. Revision A6 (January 24, 2005) Global Updated access times for S29GL512N. Product Selector Guides All tables updated. Valid Combinations Tables All ...

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Advance Information on S9GL-P AC Characteristics Changed speed specifications and units of measure for t specifications on t Revision A9 (June 15, 2005) Ordering Information table Added note to temperature range. Valid Combinations table Replaced table. DC Characteristics table Replaced ...

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... Please note that Spansion will not be liable to you and/or any third party for any claims or damages arising in connection with above-men- tioned uses of the products ...

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