AM29LV001BB-90EI Meet Spansion Inc., AM29LV001BB-90EI Datasheet
AM29LV001BB-90EI
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AM29LV001BB-90EI Summary of contents
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Data Sheet This product has been retired and is not recommended for designs. Please contact your Spansion representative for alternates. Availability of this document is retained for reference and historical purposes only. The following document contains information on Spansion memory ...
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DATA SHEET Am29LV001B 1 Megabit (128 K x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory This product has been retired and is not recommended for designs. Please contact your Spansion representative for alternates. Availability of this document is retained ...
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GENERAL DESCRIPTION The Am29LV001B Mbit, 3.0 Volt-only Flash memory device organized as 131,072 bytes. The Am29LV001B has a boot sector architecture. The device is offered in 32-pin PLCC and 32-pin TSOP packages. The byte-wide (x8) data appears ...
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TABLE OF CONTENTS Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4 Block Diagram . . . . . . . . . . ...
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PRODUCT SELECTOR GUIDE Family Part Number Regulated Voltage Range: V Speed Options Full Voltage Range: V Max access time ACC Max CE# access time Max OE# access time Note: ...
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CONNECTION DIAGRAMS A11 A13 4 5 A14 WE RESET# A16 10 A15 11 A12 PIN CONFIGURATION A0–A16 = 17 ...
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... AM29LV001BB-45R, AM29LV001BT-55, AM29LV001BB-55, AM29LV001BT-70, AM29LV001BB-70, AM29LV001BT-90, AM29LV001BB-90, Valid Combinations list configurations planned to be supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations TEMPERATURE RANGE ...
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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory loca- tion. The register is composed of ...
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DQ7–DQ0. Standard read cycle timings apply in this mode. Refer to “Autoselect Mode” on page 9 “Autoselect Command Sequence” on page 13 information the DC Characteristics table represents ...
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Table 2. Am29LV001B Top Boot Sector Architecture Sector A16 SA0 0 SA1 0 SA2 0 SA3 0 SA4 1 SA5 1 SA6 1 SA7 1 SA8 1 SA9 1 Table 3. Am29LV001B Bottom Boot Sector Architecture Sector A16 SA0 0 ...
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... Table 4. Am29LV001B Autoselect Codes Description CE# Manufacturer ID: AMD L Device ID: Am29LV001BT L (Top Boot Block) Device ID: Am29LV001BB L (Bottom Boot Block) Sector Protection L Verification L = Logic Low = Logic High = V IL Sector Protection/Unprotection The hardware sector protection feature disables both program and erase operations in any sector. The hard- ...
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START PLSCNT = 1 RESET Wait 1 μs No First Write Temporary Sector Cycle = 60h? Unprotect Mode Yes Set up sector address Sector Protect: Write 60h to sector address with ...
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START RESET# = VID (Note 1) Perform Erase or Program Operations RESET Temporary Sector Unprotect Completed (Note 2) Notes: 1. All protected sectors unprotected. 2. All previously protected sectors are protected once again. Figure 2. Temporary Sector Unprotect ...
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COMMAND DEFINITIONS Writing specific address and data commands or sequences into the command register initiates device operations. Table 5 on page 17 defines the valid reg- ister command sequences. Note that writing incorrect address and data values or writing them ...
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The system can determine the status of the program operation by using DQ7 or DQ6. See “Write Operation Status” on page 18 for information on these status bits. Any commands written to the device during ...
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The system can determine the status of the erase oper- ation by using DQ7, DQ6, or DQ2. See Operation Status” on page 18 for information on these status bits. ...
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The system may also write the autoselect command sequence when the device is in the Erase Suspend mode. The device allows reading autoselect codes even at addresses within erasing sectors, since the codes are not stored in the memory array. ...
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Command Definitions Table 5. Am29LV001B Command Definitions First Command Sequence (Note 1) Addr Read (Note Reset (Note 6) 1 XXX Manufacturer ID 4 555 Device ID, Top Boot Block 4 555 Device ID, Bottom Boot Block Sector ...
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WRITE OPERATION STATUS The device provides several bits to determine the status of a write operation: DQ2, DQ3, DQ5, DQ6, and DQ7. Table 6 on page 21 and the following subsections describe the functions of these bits. DQ7, and DQ6 ...
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During an Embedded Program or Erase algorithm operation, successive read cycles to any address cause DQ6 to toggle (The system may use either OE# or ...
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START Read DQ7–DQ0 Read DQ7–DQ0 (Note 1) No Toggle Bit = Toggle? Yes No DQ5 = 1? Yes Read DQ7–DQ0 Twice (Notes 1, 2) Toggle Bit No = Toggle? Yes Program/Erase Operation Not Operation Complete Complete, Write Reset Command Notes: ...
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Operation Embedded Program Algorithm Standard Mode Embedded Erase Algorithm Reading within Erase Suspended Sector Erase Suspend Reading within Non-Erase Mode Suspended Sector Erase-Suspend-Program Notes: 1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . –65°C to +150°C Ambient Temperature with Power Applied ...
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DC CHARACTERISTICS CMOS Compatible Parameter Description I Input Load Current Input Load Current LIT I RESET# Input Load Current LR I Output Leakage Current LO V Active Read Current CC I CC1 (Notes Active ...
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DC CHARACTERISTICS (CONTINUED) Zero Power Flash 500 1000 Note: Addresses are switching at 1 MHz Figure 9. I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 ...
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TEST CONDITIONS Device Under Test CL 6.2 kW Note: Diodes are IN3064 or equivalent Figure 11. Test Setup KEY TO SWITCHING WAVEFORMS WAVEFORM Don’t Care, Any Change Permitted 3.0 V 1.5 V Input 0.0 V Figure 12. Input Waveforms and ...
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AC CHARACTERISTICS Read Operations Parameter JEDEC Std Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output Enable to Output ...
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AC CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std Description t RESET# Pin Low (During Embedded READ Algorithms) to Read or Write (See Note) Y RESET# Pin Low (NOT During t READ Embedded Algorithms) to Read or Write Y (See Note) ...
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AC CHARACTERISTICS Erase/Program Operations Parameter JEDEC Std t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH Data ...
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AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE# OE# WE Data VCS Note program address program data, DOUT is the true data at the program address. ...
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AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE Data t VCS V CC Note sector address (for Sector Erase Valid Address for reading ...
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AC CHARACTERISTICS t RC Addresses VA t ACC OE# t OEH WE# DQ7 DQ0–DQ6 Note Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and array ...
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AC CHARACTERISTICS Enter Erase Embedded Suspend Erasing Erase Erase Suspend WE# DQ6 DQ2 Note: The system can use OE# or CE# to toggle DQ2/DQ6. DQ2 toggles only when read at an address within an erase-suspended sector. Temporary Sector Unprotect Parameter ...
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AC CHARACTERISTICS RESET# SA, A6, A1, A0 Sector Protect/Unprotect Data 60h 1 µs CE# WE# OE# Note: For sector protect For sector unprotect ...
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AC CHARACTERISTICS Alternate CE# Controlled Erase/Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVEL Address Hold Time ELAX Data Setup Time DVEH ...
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AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# Notes: 1. Figure indicates the last two bus cycles of the program or erase command sequence ...
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ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Byte Programming Time Chip Programming Time (Note 3) Notes: 1. Typical program and erase times assume the following conditions: 25×C, 3.0 V VCC, 1,000,000 cycles. Additionally, programming typicals assume ...
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DATA RETENTION Parameter Minimum Pattern Data Retention Time May 5, 2006 21557F4 Test Conditions 150×C 125×C Am29LV001B Min Unit 10 Years 20 Years 37 ...
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PHYSICAL DIMENSIONS PL 032—32-Pin Plastic Leaded Chip Carrier Am29LV001B Dwg rev AH; 10/99 21557F4 May 5, 2006 ...
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PHYSICAL DIMENSIONS* TS 032—32-Pin Standard Thin Small Outline Package * For reference only. BSC is an ANSI standard for Basic Space Centering. May 5, 2006 21557F4 Am29LV001B Dwg rev AA; 10/99 ...
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REVISION SUMMARY Revision A (January 1998) Initial release. (This revision also represented the Am29LV010B device.) Revision A+1 (February 1998) Logic Symbol Deleted the BYTE# input from the drawing. (This revi- sion also represented the Am29LV010B device.) Revision B (April 1998) ...
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Colophon The products described in this document are designed, developed and manufactured as contemplated for general use, including without limita- tion, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as ...