SST28SF040A-90-4I-EH Silicon Storage Technology, Inc, SST28SF040A-90-4I-EH Datasheet

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SST28SF040A-90-4I-EH

Manufacturer Part Number
SST28SF040A-90-4I-EH
Description
4 Mbit (512K x 8) super-flash EEPROM
Manufacturer
Silicon Storage Technology, Inc
Datasheet
FEATURES:
• Single Voltage Read and Write Operations
• Superior Reliability
• Memory Organization: 512K x8
• Sector-Erase Capability: 256 Bytes per Sector
• Low Power Consumption
• Fast Sector-Erase/Byte-Program Operation
PRODUCT DESCRIPTION
The SST28SF/VF040A are 512K x8 bit CMOS Sector-
Erase, Byte-Program EEPROMs. The SST28SF/VF040A
are manufactured using SST’s proprietary, high perfor-
mance CMOS SuperFlash EEPROM Technology. The
split-gate cell design and thick oxide tunneling injector
attain better reliability and manufacturability compared with
alternative approaches. The SST28SF/VF040A erase and
program with a single power supply. The SST28SF/
VF040A conform to JEDEC standard pinouts for byte wide
memories and are compatible with existing industry stan-
dard flash EEPROM pinouts.
Featuring high performance programming, the SST28SF/
VF040A typically Byte-Program in 35 µs. The SST28SF/
VF040A typically Sector-Erase in 2 ms. Both Program and
Erase times can be optimized using interface features such
as Toggle bit or Data# Polling to indicate the completion of
the Write cycle. To protect against an inadvertent write, the
SST28SF/VF040A have on chip hardware and Software
Data Protection schemes. Designed, manufactured, and
tested for a wide spectrum of applications, the SST28SF/
VF040A are offered with a guaranteed sector endurance of
10,000 cycles. Data retention is rated greater than 100
years.
The SST28SF/VF040A are best suited for applications that
require reprogrammable nonvolatile mass storage of pro-
gram, configuration, or data memory. For all system appli-
©2001 Silicon Storage Technology, Inc.
S71077-04-000 6/01
1
– 5.0V-only for SST28SF040A
– 2.7-3.6V for SST28VF040A
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
– Active Current: 15 mA (typical) for 5.0V and
– Standby Current: 5 µA (typical)
– Byte-Program Time: 35 µs (typical)
– Sector-Erase Time: 2 ms (typical)
– Complete Memory Rewrite: 20 sec (typical)
10 mA (typical) for 2.7-3.6V
SST28SF040A / SST28VF040A5.0 & 2.7 4Mb (x8) Byte-Program, Small Erase Sector flash memories
4 Mbit (512K x8) SuperFlash EEPROM
310
SST28SF040A / SST28VF040A
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.
• Fast Read Access Time
• Latched Address and Data
• Hardware and Software Data Protection
• End-of-Write Detection
• TTL I/O Compatibility
• JEDEC Standard
• Packages Available
cations, the SST28SF/VF040A significantly improve
performance and reliability, while lowering power consump-
tion when compared with floppy diskettes or EPROM
approaches. Flash EEPROM technology makes possible
convenient and economical updating of codes and control
programs on-line. The SST28SF/VF040A improve flexibil-
ity, while lowering the cost of program and configuration
storage application.
The functional block diagram shows the functional blocks of
the SST28SF/VF040A. Figures 1, 2, and 3 show the pin
assignments for the 32-lead PLCC, 32-lead TSOP , and 32-
pin PDIP packages. Pin descriptions and operation modes
are described in Tables 2 through 5.
Device Operation
Commands are used to initiate the memory operation func-
tions of the device. Commands are written to the device
using standard microprocessor write sequences. A com-
mand is written by asserting WE# low while keeping CE#
low. The address bus is latched on the falling edge of WE#
or CE#, whichever occurs last. The data bus is latched on
the rising edge of WE# or CE#, whichever occurs first.
Note, during the Software Data Protection sequence the
addresses are latched on the rising edge of OE# or CE#,
whichever occurs first.
– 5.0V-only operation: 90 and 120 ns
– 2.7-3.6V operation: 150 and 200 ns
– 7-Read-Cycle-Sequence Software Data
– Toggle Bit
– Data# Polling
– Flash EEPROM Pinouts
– 32-lead PLCC
– 32-lead TSOP (8mm x 14mm and 8mm x 20mm)
– 32-pin PDIP
Protection
These specifications are subject to change without notice.
SSF is a trademark of Silicon Storage Technology, Inc.
Data Sheet

Related parts for SST28SF040A-90-4I-EH

SST28SF040A-90-4I-EH Summary of contents

Page 1

... Mbit (512K x8) SuperFlash EEPROM SST28SF040A / SST28VF040A SST28SF040A / SST28VF040A5.0 & 2.7 4Mb (x8) Byte-Program, Small Erase Sector flash memories FEATURES: • Single Voltage Read and Write Operations – 5.0V-only for SST28SF040A – 2.7-3.6V for SST28VF040A • Superior Reliability – Endurance: 100,000 Cycles (typical) – Greater than 100 years Data Retention • ...

Page 2

... If an erase error occurs a Chip-Erase ©2001 Silicon Storage Technology, Inc. 4 Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A command can be reissued as many times as necessary to complete the Chip-Erase operation. The SST28SF/ VF040A cannot be over-erased. (See Figure 8) ...

Page 3

... Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A Data Sheet The Read operation of the SST28SF/VF040A are con- trolled by OE# and CE# at logic low. When high, the chip is deselected and only standby power will be con- sumed. OE# is the output control and is used to gate data from the output pins ...

Page 4

... PLCC Top View 32- PLCC LEAD 4 4 Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A Data Sheet I RODUCT DENTIFICATION Address 0000H 0001H SuperFlash Memory Y-Decoder 310 ILL B1.1 A14 A13 A8 A9 A11 OE# A10 CE# DQ7 310 ILL F02 ...

Page 5

... Data is internally latched during a Write cycle. The outputs are in tri-state when OE# or CE# is high. To activate the device when CE# is low. To gate the data output buffers control the Write operations. To provide: 5.0V supply (±10%) for SST28SF040A 2.7V supply (2.7-3.6V) for SST28VF040A 5 OE A10 ...

Page 6

... but no other value sector size = 256 Bytes Byte Select T5.0 310 6 4 Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A Data Sheet Address See Table 4 IN, A See Table 4 IN See Table ...

Page 7

... Industrial -40°C to +85° ONDITIONS OF EST Input Rise/Fall Time . . . . . . . . . . . . . . 10 ns Output Load . . . . . . . . . . . . . . . . . . . . . 1 TTL Gate andC See Figures 14 and 15 ©2001 Silicon Storage Technology, Inc 5.0V±10% 5.0V±10 2.7-3.6V 2.7-3.6V = 100 pF for SST28SF040A 100 pF for SST28VF040A 0. 1.0V DD S71077-04-000 6/01 310 ...

Page 8

... SST28VF040A Limits Min Max Units µA 1 µA 10 µA 0.8 V 2.0 V 0.4 V 2.4 V 11.6 12.4 V 200 µ Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A Data Sheet Test Conditions Address input f=1/T Min Max DD DD CE#=OE#=V , WE#=V , all I/Os open IL IH CE#=WE#=V , OE#= Max CE#= Max ...

Page 9

... Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A Data Sheet TABLE ECOMMENDED YSTEM Symbol Parameter 1 T Power-up to Read Operation PU-READ 1 T Power-up to Write Operation PU-WRITE 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. TABLE 9: C APACITANCE (Ta = 25° ...

Page 10

... This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. ©2001 Silicon Storage Technology, Inc. SST28SF040A ARAMETERS FOR SST28SF040A-90 Min SST28VF040A ARAMETERS FOR SST28VF040A-150 Min 150 Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A Data Sheet SST28SF040A-120 Max Min Max 120 90 120 90 120 ...

Page 11

... Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A Data Sheet TABLE 13 RASE ROGRAM YCLE IEEE Industry Symbol Symbol Parameter tAVA T Byte-Program Cycle Time BP tWLWH T Write Pulse Width (WE#) WP tAVWL T Address Setup Time AS tWLAX T Address Hold Time AH tELWL T CE# Setup Time CS tWHEX T CE# Hold Time ...

Page 12

... T OES DATA VALID YTE ROGRAM YCLE IMING IAGRAM 12 4 Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A Data Sheet CHZ T OH DATA VALID 310 ILL F03.2 T OEH T WPH T BP 310 ILL F04.1 S71077-04-000 6/01 T OHZ 310 ...

Page 13

... Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A Data Sheet ADDRESS A 18-0 CE# OE# WE# DQ 7-0 I0H T DS BYTE-PROGRAM SETUP COMMAND FIGURE 6: CE# C ONTROLLED ADDRESS A 18-0 CE# OE# WE 7-0 FIGURE ESET OMMAND ©2001 Silicon Storage Technology, Inc CPH T OES ...

Page 14

... ECTOR RASE IMING ©2001 Silicon Storage Technology, Inc 30H T SCE EXECUTE COMMAND D IAGRAM D0H T SE EXECUTE COMMAND D IAGRAM 14 4 Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A Data Sheet 310 ILL F07.0 310 ILL F08.0 S71077-04-000 6/01 310 ...

Page 15

... Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A Data Sheet OE# T PCP CE# WE# ADDRESS 1823 1820 T PAH T PAS NOTE: A. ADDRESSES ARE LATCHED INTERNALLY ON THE RISING EDGE OF: FIGURE 10 OFTWARE ATA OE# T PCP CE# WE# ADDRESS 1823 1820 T PAH T PAS NOTE: A. ADDRESSES ARE LATCHED INTERNALLY ON THE RISING EDGE OF: ...

Page 16

... Silicon Storage Technology, Inc OEH NOTE D IAGRAM NOTE D IAGRAM 16 4 Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A Data Sheet T OES D# D 310 ILL F11.0 T OES TWO READ CYCLES WITH SAME OUTPUTS 310 ILL F12.0 S71077-04-000 6/01 310 ...

Page 17

... Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A Data Sheet V IHT INPUT V ILT AC test inputs are driven at V (2.4V) for a logic “1” and V IHT inputs and outputs are V (2.0 V) and V HT FIGURE 14 NPUT UTPUT TO DUT FIGURE 15 EST OAD XAMPLE ©2001 Silicon Storage Technology, Inc. ...

Page 18

... Program Setup Command Load Address and Data & Start Programming Read End-of-Write Detection No Programming Completed? Yes No Data Verifies? Yes No Last Address Yes Programming Completed 18 4 Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A Data Sheet Programming Failure 310 ILL F15.3 S71077-04-000 6/01 310 ...

Page 19

... Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A Data Sheet Internal Timer Program/Erase Initiated Wait Program/Erase Completed FIGURE 17 RITE AIT PTIONS ©2001 Silicon Storage Technology, Inc. Toggle Bit Program/Erase Initiated Read byte Read same byte No Does DQ 6 match? Yes Program/Erase ...

Page 20

... Increment Byte Address Next Sector Address FIGURE 18 ECTOR RASE LOWCHARTS ©2001 Silicon Storage Technology, Inc. 4 Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A Start Initialize Sector Address Execute Two Step Sector-Erase Command End-of-Write Detection Erase No completed? Yes Read FFH from Selected Byte ...

Page 21

... Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A Data Sheet FIGURE 19 OFTWARE RODUCT ©2001 Silicon Storage Technology, Inc. Execute Read ID Command (90H) to Enter Read-ID mode Read Address 0000H MFG SST (BFH) Read Address 0001H Device ID = 28SF040 (04H) Execute Reset Command (FFH) to Exit from Read-ID mode 310 ILL F18 ...

Page 22

... PRODUCT ORDERING INFORMATION Device Speed Suffix1 SST28xF040A - XXX - XX Valid combinations for SST28SF040A SST28SF040A-90-4C-NH SST28SF040A-90-4C-WH SST28SF040A-120-4C-NH SST28SF040A-120-4C-WH SST28SF040A-120-4C-EH SST28SF040A-120-4I-NH SST28SF040A-120-4I-WH Valid combinations for SST28VF040A SST28VF040A-150-4C-NH SST28VF040A-150-4C-WH SST28VF040A-150-4C-EH SST28VF040A-200-4C-NH SST28VF040A-200-4C-WH SST28VF040A-200-4C-EH SST28VF040A-200-4I-NH SST28VF040A-200-4I-WH Note: Valid combinations are those products in mass production or will be in mass production. Consult your SST sales representative to confirm availability of valid combinations and to determine availability of new combinations ...

Page 23

... Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A Data Sheet PACKAGING DIAGRAMS TOP VIEW .485 .495 .447 Optional .453 Pin #1 Identifier .042 .048 .042 .048 .585 .547 .595 .553 .050 BSC. Note: 1. Complies with JEDEC publication 95 MS-016 AE dimensions, although some dimensions may be more stringent. ...

Page 24

... Silicon Storage Technology, Inc. 18.50 18.30 20.20 19.80 (TSOP ACKAGE 1.645 1.655 .120 .150 .016 .100 BSC .022 (PDIP) www.SuperFlash.com or www.ssti.com 24 4 Mbit SuperFlash EEPROM SST28SF040A / SST28VF040A Data Sheet 1.05 0.95 .50 BSC .27 8.10 .17 7.90 0.15 0.05 32.TSOP-EH-ILL.4 .600 .625 .530 .550 7˚ 4 PLCS. .170 .200 .008 ...

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