A500K130 Actel Corporation, A500K130 Datasheet

Page 1

... • 150 MHz Synchronous and Asynchronous Operation • Netlist Generator Ensures Optimal Usage of Embedded Memory Blocks IEEE Std. 1149.1 (JTAG) Compliant A500K050 A500K130 A500K180 100,000 290,000 370,000 43,000 105,000 ...

Page 2

... A500K130 PQ Package Type BG = Plastic Ball Grid Array PQ = Plastic Quad Flat Pack FG = Fine Ball Grid Array Part Number A500K050 = 100,000 Equivalent System Gates A500K130 = 290,000 Equivalent System Gates A500K180 = 370,000 Equivalent System Gates A500K270 = 475,000 Equivalent System Gates Note: This family has been discontinued ...

Page 3

... A500K050 Device 144-Pin Fine Ball Grid Array (FBGA) 208-Pin Plastic Quad Flat Pack (PQFP) 272-Pin Plastic Ball Grid Array (PBGA) A500K130 Device 144-Pin Fine Ball Grid Array (FBGA) 208-Pin Plastic Quad Flat Pack (PQFP) 272-Pin Plastic Ball Grid Array (PBGA) 256-Pin Plastic Ball Grid Array (PBGA) ...

Page 4

The ProASIC 500K family’s proprietary architecture provides granularity comparable to gate arrays. Unlike SRAM-based FPGAs that utilize look-up tables or ...

Page 5

Pr oAS Word Figure 2 • Flash Switch (CLK (Reset) Figure 3 • Core Logic Tile ...

Page 6

Figure 4 • Ultra Fast Local Resources 4 Tiles Long 2 Tiles Long Figure 5 • Efficient Long Line Resources Inputs ...

Page 7

Pr oAS Speed Very Long Line Resouces PAD RING Figure 6 • High Speed Very Long Line Resources Discontinued – v3.0 7 ...

Page 8

... A500K270 device (Table 1). Global Pads PAD RING Figure 7 • A500K130 Global Routing Resources Table 1 • Number of Clock Spines Top Spine Height Tiles in Each Top Spine Bottom Spine Height Tiles in Each Bottom Spine Global Clock Networks (Trees) ...

Page 9

Pr oAS meet complex system design needs, the ProASIC 500K family offers devices with ...

Page 10

These pins are dedicated for boundary-scan test usage. The TAP controller is a four-bit state machine (16 states) that operates as shown in Figure 11 ...

Page 11

Pr oAS Select-DR- Scan 0 Figure 11 • TAP Controller State Diagram The ProASIC 500K devices ...

Page 12

Figure 15 on page 14 gives an example of optimal memory usage. Ten blocks with 23,040 bits have been used to generate three memories of various widths and depths. Figure 16 on page 14 shows how memory can be doubled ...

Page 13

Pr oAS <0:8> SRAM WADDR <0:7> (256 X 9) WRB Sync Write & WBLKB Sync Read Ports WCLKS WPE PARODD DI <0:8> SRAM WADDR <0:7> (256 X ...

Page 14

Word 256 Depth Figure 14 • A500K270 Memory Block Architecture Word Width 9 Word 256 Depth 256 256 256 1,024 words x 9bits, 1 read, 1 write Figure 15 • Example Showing Memories with Different Widths and Depths Word Width ...

Page 15

Pr oAS ProASIC devices are supported by Actel’s Designer Series software, as ...

Page 16

The ProASIC 500K family is available in a number of package types. Actel has selected packages ...

Page 17

Pr oAS ProASIC device ...

Page 18

Parameter Supply Voltage Core (V ) DDL ...

Page 19

Pr oAS ...

Page 20

Symbol Parameter V Supply Voltage DDP V Supply Voltage, Logic Array DDL Output High ...

Page 21

Pr oAS ...

Page 22

Symbol Parameter Switching Current High I OH(AC) (Test Point) Switching Current Low I OL(AC) ...

Page 23

Pr oAS Figure 18 shows the 3.3V PCI V/I curve and the minimum and maximum PCI drive characteristics of the ProASIC family. 150.0 100.0 50.0 0.0 0 0.5 ...

Page 24

...

Page 25

Pr oAS ...

Page 26

...

Page 27

Pr oAS ...

Page 28

...

Page 29

Pr oAS Synchronous RAM Read, Access Timed Output Strobe (Synchronous Transparent) RCLKS RB=(RBD+RBLKB) RADDR DO RPE t RACS t RDCS ° ...

Page 30

Synchronous RAM Read, Pipeline Mode Outputs (Synchronous Pipelined) RCLKS RB=(RDB+RBLKB) New Valid RADDR Address DO RPE t RACS t RACH t RDCH t RDCS ° 0° ...

Page 31

Pr oAS Asynchronous RAM Write WADDR WB=(WRB+WBLKB) WPE ° 0° ...

Page 32

Asynchronous RAM Read, Address Controlled, RDB=0 RADDR ° 0° DDL Symbol t Description xxx ACYC Read cycle time OAA New ...

Page 33

Pr oAS Synchronous RAM Write WCLKS WRB, WBLKB WADDR, DI WPE t WRCH , t WBCH t WRCS , t WBCS t DCS , t WDCS t WPCH ...

Page 34

Asynchronous FIFO Full and Empty Transitions The asynchronous FIFO accepts writes and reads while not full or not empty. When the FIFO is full, all writes are inhibited. Conversely, when the FIFO is empty, all reads are inhibited. A problem ...

Page 35

Pr oAS FULL RB Write Write inhibited cycle WB Figure 19 • Write Timing Diagram EMPTY WB Read Read inhibited cycle RB Figure 20 • Read Timing Diagram ...

Page 36

Asynchronous FIFO Read RB=(RDB+RBLKB) DO RPE WB EMPTY FULL EQTH, GETH t RDWRS t RPRDH T = 0°C to 110° 2.3V to 2.7V J DDL Symbol t Description xxx ERDH, Old EMPTY, FULL, EQTH, & GETH valid hold ...

Page 37

Pr oAS Asynchronous FIFO Write WB=(WRB+WBLKB) DI WPE RB FULL EMPTY EQTH, GETH t WRRDS T = 0°C to 110° 2.3V to 2.7V DDL J Symbol ...

Page 38

Synchronous FIFO Read, Access Timed Output Strobe (Synchronous Transparent) RCLKS RDB DO Old Data Out RPE EMPTY FULL EQTH, GETH t RDCH t RDCS t OCH t RPCH T = 0°C to 110° 2.3V to 2.7V J DDL ...

Page 39

Pr oAS Synchronous FIFO Read, Pipeline Mode Outputs (Synchronous Pipelined) RCLKS RDB DO RPE EMPTY FULL EQTH, GETH t RDCH t RDCS T = 0°C to 110°C; V ...

Page 40

Synchronous FIFO Write WCLKS WRB, WBLKB DI WPE FULL EMPTY EQTH, GETH t WRCH , t WBCH t WRCS , t WBCS t DCS t WPCH t DCH T = 0°C to 110° 2.3V to 2.7V J DDL ...

Page 41

Pr oAS FIFO Reset RESETB WRB, WBLKB WCLKS, RCLKS FULL EMPTY EQTH, GETH t ERSA , t FRSA t THRSA ° ...

Page 42

I/O User Input/Output The I/O pin functions as an input, output, three-state, or bidirectional buffer. Input and output signal levels are compatible with standard LVTTL specifications. Unused ...

Page 43

Pr oAS 208 ...

Page 44

... DDL DDL I/O I/O 89 I/O I/O 90 I/O I DDP DDP GND GND 93 I/O I/O 94 I/O I/O 95 I/O I/O 96 I/O I/O 97 I/O I/O 98 I/O I/O 99 I/O I/O 100 I/O I/O 101 I/O I/O 102 I/O I/O 103 GND GND 104 Discontinued – v3.0 ® Pr oAS A500K130 A500K180 A500K270 Function Function Function DDP DDP DDP I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O GND GND GND I/O I/O I/O I/O I/O I/O I/O I/O ...

Page 45

... GND GND 193 V V 194 DDL DDL I/O I/O 195 I/O I/O 196 I/O I/O 197 I/O I/O 198 I/O I/O 199 I/O I/O 200 I/O I/O 201 I/O I/O 202 I/O I/O 203 I/O I/O 204 I/O I/O 205 I/O I/O 206 I/O I/O 207 GND GND 208 Discontinued – v3.0 A500K130 A500K180 A500K270 Function Function Function DDP DDP DDP I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O GND GND GND I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I DDP ...

Page 46

...

Page 47

... D19 I/O I/O D20 I/O I/O E1 I/O I/O E2 I/O I/O E3 I/O I DDP DDP E17 V V DDP DDP E18 I/O I/O E19 I/O I/O E20 I/O I/O F1 I/O I/O F2 I/O I/O F3 I/O I DDP DDP Discontinued – v3.0 Pin A500K050 A500K130 Number Function Function F17 V V DDP DDP F18 I/O I/O F19 I/O I/O F20 I/O I/O G1 I/O I/O G2 I/O I/O G3 I/O I/O G4 I/O I/O G17 I/O I/O G18 I/O I/O G19 I/O I/O G20 I/O I/O H1 I/O I/O H2 I/O I/O H3 I/O I/O ...

Page 48

... I/O V5 I/O I/O V6 I/O I/O V7 I/O I/O V8 I/O I/O V9 I/O I/O V10 I/O I/O V11 I/O I/O V12 I/O I/O V13 I/O I/O V14 I/O I/O V15 I/O I/O V16 I/O I/O V17 TMS TMS V18 TDO TDO Discontinued – v3.0 ® Pr oAS Pin A500K050 A500K130 Number Function Function V19 I/O I/O V20 I/O I/O W1 I/O I/O W2 I/O I/O W3 I/O I/O W4 I/O I/O W5 I/O I/O W6 I/O I/O W7 I/O I/O W8 I/O I/O W9 I/O I/O W10 I/O I/O W11 I/O I/O W12 I/O I/O W13 I/O I/O W14 ...

Page 49

Pr oAS ...

Page 50

... AA26 NC I/O AB1 NC I/O AB2 I/O I/O AB3 I/O I/O AB4 I/O I/O AB5 V V DDL DDL AB6 V V DDL DDL AB7 V V DDL DDL AB8 I/O I/O AB9 I/O I/O AB10 I/O I/O 50 A500K270 A500K130 Function Pin Number Function V AB11 I/O DDP V AB12 I/O DDP I/O AB13 I/O I/O AB14 I/O I/O AB15 I/O I/O AB16 I/O I/O AB17 I/O I/O AB18 I/O I/O AB19 I/O I/O AB20 V DDL I/O AB21 V DDL ...

Page 51

... AE11 I/O I/O AE12 I/O I/O AE13 I/O I/O AE14 I/O I/O AE15 I/O I/O AE16 I/O I/O AE17 I/O I/O AE18 I/O I/O AE19 I/O I/O AE20 I/O I/O AE21 I/O I/O AE22 I/O I/O AE23 AE24 TRST TRST A500K270 A500K130 Function Pin Number Function I/O AE25 V DDP I/O AE26 V DDP I/O AF1 V DDP I/O AF2 V DDP I/O AF3 NC I/O AF4 NC I/O AF5 I/O I/O AF6 NC I/O AF7 NC I/O AF8 I/O I/O AF9 NC I/O AF10 NC I/O AF11 ...

Page 52

... V V DDP DDP C25 I/O I/O C26 NC I I/O D2 I/O I/O D3 I/O I DDP DDP D5 I/O I/O D6 I/O I/O D7 I/O I/O D8 I/O I/O D9 I/O I/O D10 I/O I/O D11 I/O I/O D12 I/O I/O 52 A500K270 A500K130 Function Pin Number Function I/O D13 I/O I/O D14 I/O I/O D15 I/O I/O D16 I/O I/O D17 I/O I/O D18 I/O V D19 I/O DDP V D20 I/O DDP V D21 I/O DDP I/O D22 I/O V D23 V DDP DDP I/O D24 I/O I/O D25 I/O I/O D26 ...

Page 53

... J22 I/O I/O J23 I/O I/O J24 I/O I/O J25 I/O I/O J26 NC I I/O K2 I/O I/O K3 I/O I/O K4 I/O I/O K5 I/O I/O K22 I/O I/O K23 I/O I/O K24 I/O I/O K25 I/O I/O K26 I/O I I/O L2 I/O I/O A500K270 A500K130 Function Pin Number Function I/O L3 I/O I/O L4 I/O I/O L5 I/O I/O L11 GND I/O L12 GND I/O L13 GND I/O L14 GND I/O L15 GND V L16 GND DDL V L22 I/O DDL I/O L23 I/O I/O L24 I/O I/O L25 I/O I/O L26 NC I I/O ...

Page 54

... T1 NC I/O T2 I/O I/O T3 I/O I/O T4 I/O I/O T5 I/O I/O T11 GND GND T12 GND GND T13 GND GND T14 GND GND T15 GND GND T16 GND GND T22 I/O I/O 54 A500K270 A500K130 Function Pin Number Function I/O T23 I/O I/O T24 I/O I/O T25 I/O I/O T26 I/O I GND U2 I/O GND U3 I/O GND U4 I/O GND U5 I/O GND U22 I/O GND U23 I/O I/O ...

Page 55

Pr oAS (Continued ...

Page 56

... I/O F5 GND GND F6 GND GND F7 GND GND F8 I/O I F10 GND GND F11 I/O I/O F12 GL GL Discontinued – v3.0 ® Pr oAS Pin A500K050 A500K130 Number Function Function G1 I/O I/O G2 GND GND G3 I/O I/O G4 I/O I/O G5 GND GND G6 GND GND G7 GND GND G8 I/O I/O G9 I/O I/O G10 ...

Page 57

... Function L1 GND GND L2 I/O I/O L3 I/O I/O L4 I/O I DDP DDP L6 I/O I/O L7 I/O I/O L8 I/O I/O L9 TMS TMS L10 RCK RCK L11 I/O I/O L12 TRST TRST Discontinued – v3.0 Pin A500K050 A500K130 Number Function Function M1 I/O I/O M2 I/O I/O M3 I/O I/O M4 I/O I/O M5 I/O I/O M6 I/O I/O M7 I/O I/O M8 I/O I/O M9 TDI TDI M10 V V DDP DDP M11 M12 ...

Page 58

(Continued Ball Pad Corner 14 13 ...

Page 59

... GND GND B1 I/O I/O B2 I/O I/O B3 I/O I/O B4 I/O I/O B5 I/O I/O B6 I/O I/O B7 I/O I/O B8 I/O I/O B9 I/O I/O B10 I/O I/O B11 I/O I/O B12 I/O I/O B13 I/O I/O B14 I/O I/O B15 I/O I/O B16 I/O I/O C1 I/O I/O C2 I/O I/O C3 I/O I/O C4 I/O I/O C5 I/O I/O C6 I/O I/O C7 I/O I/O A500K270 Pin A500K130 Function Number Function GND C8 I/O I/O C9 I/O I/O C10 I/O I/O C11 I/O I/O C12 I/O I/O C13 I/O I/O C14 I/O I/O C15 I/O I/O C16 I/O I/O D1 I/O I/O D2 I/O I/O D3 I/O I/O D4 I/O I/O D5 I/O I/O D6 I/O GND D7 I/O I/O D8 I/O I/O D9 I/O I/O D10 I/O I/O D11 I/O I/O D12 I/O I/O D13 I/O I/O D14 I/O ...

Page 60

... GND G11 V V DDL DDL G12 V V DDP DDP G13 I/O I/O G14 I/O I/O G15 I/O I/O G16 I/O I I/O I/O H3 I/O I/O H4 I/O I/O H5 I/O I/O 60 A500K270 Pin A500K130 Function Number Function I I/O H7 GND I/O H8 GND I/O H9 GND I/O H10 GND I/O H11 V V H12 I/O DDP GND H13 I/O V H14 I/O DDL V H15 I/O DDL V H16 GL DDL ...

Page 61

... DDP DDP DDP M8 I/O I/O M9 I/O I/O M10 V V DDP DDP M11 V V DDP DDP M12 I/O I/O M13 I/O I/O M14 I/O I/O M15 I/O I/O M16 I/O I/O N1 I/O I/O N2 I/O I/O N3 I/O I/O A500K270 Pin A500K130 Function Number Function I/O N4 I/O I/O N5 I/O I/O N6 I/O I/O N7 I/O I/O N8 I/O I/O N9 I/O I/O N10 I/O I/O N11 I/O V N12 I/O DDP GND N13 I/O V N14 RCK DDL V N15 I/O DDL V N16 I/O DDL V ...

Page 62

... Function Function R11 I/O I/O R12 I/O I/O R13 I/O I/O R14 TDI TDI R15 R16 TDO TDO T1 GND GND T2 I/O I/O T3 I/O I/O T4 I/O I/O T5 I/O I/O 62 A500K270 Pin A500K130 Function Number Function I/O T6 I/O I/O T7 I/O I/O T8 I/O TDI T9 I/O V T10 I/O PN TDO T11 I/O GND T12 I/O I/O T13 I/O I/O T14 I/O I/O T15 TMS I/O T16 GND Discontinued – v3.0 ® ...

Page 63

Pr oAS (Continued ...

Page 64

Pin A500K270 Pin A500K270 Number Function Number Function A1 GND AA13 A2 GND AA14 A3 I/O AA15 A4 I/O AA16 A5 I/O AA17 A6 I/O AA18 A7 I/O AA19 A8 I/O ...

Page 65

Pr oAS Pin A500K270 Pin A500K270 Number Function Number Function B9 ...

Page 66

Pin A500K270 Pin A500K270 Number Function Number Function J17 V L3 DDL J18 V L4 DDL J19 V L5 DDP J20 NC L6 J21 ...

Page 67

Pr oAS Pin A500K270 Pin A500K270 Number Function Number Function T25 ...

Page 68

... MHz)” on page 26 J “Global Input Buffer Delays (Worst-Case Commercial = 3.0V 2.3V 70°C, fCLOCK = 250 MHz)” on page 27 DDL J for A500K050 is new. for A500K130 and A500K270 are Discontinued – v3.0 ® Pr oAS Page page 3 page 3 page 13 ...

Page 69

Pr oAS order to provide the latest information to designers, some ...

Page 70

...

Page 71

...

Page 72

... Actel and the Actel logo are registered trademarks of Actel Corporation. All other trademarks are the property of their owners. Actel Europe Ltd. Maxfli Court, Riverside Way Camberley, Surrey GU15 3YL United Kingdom Tel: +44 (0)1276 401450 Fax: +44 (0)1276 401490 http://www.actel.com Actel Corporation ...