MTV312MV64 List of Unclassifed Manufacturers, MTV312MV64 Datasheet
MTV312MV64
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MTV312MV64 Summary of contents
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MYSON TECHNOLOGY 8051 Embedded Monitor Controller FEATURES 8051 core, 12MHz operating frequency with double CPU clock option 0.35uM process; 5V/3.3V power supply and I/O; 3.3V core operating 1024-byte RAM; 64K-byte program Flash-ROM support In System Programming (ISP) Maximum 14 channels ...
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MYSON TECHNOLOGY PIN CONNECTION DA2/P5 DA1/P5 DA0/P5 VDD3 4 37 VDD 5 36 VSS MTV312M 40 Pin ISDA/P3.4/ PDIP ISCL/P3.5/ STOUT/P4.2 11 ...
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MYSON TECHNOLOGY PIN CONFIGURATION A “CMOS output pin” means it can sink and drive at least 4mA current not recommended to use such pin as input function. A “open drain pin” means it can sink at least 4mA ...
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MYSON TECHNOLOGY PIN DESCRIPTION PIN NO. Name VDD3 VDD VSS RST DA0/P5 DA1/P5.1 2 ...
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MYSON TECHNOLOGY FUNCTIONAL DESCRIPTIONS 1. 8051 CPU Core The CPU core of MTV312M is compatible with the industry standard 8051, which includes 256 bytes RAM, Special Function Registers (SFR), two timers, five interrupt sources and a serial interface. The CPU ...
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MYSON TECHNOLOGY 3. Chip Configuration The Chip Configuration registers define configuration of the chip and function of the pins. Reg name addr bit7 PADMOD F50h(w) DA13E PADMOD F51h(w) PADMOD F52h(w) HIICE PADMOD F53h(w) PADMOD F54h(w) P67oe PADMOD F55h(w) COP17 OPTION ...
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MYSON TECHNOLOGY HCLPE = 1 Pin “DA7/HCLAMP” is HSYNC clamp pulse output Pin “DA7/HCLAMP” is DA7. P42E = 1 Pin “STOUT/P4.2” is P4. Pin “STOUT/P4.2” is STOUT. P41E = 1 Pin “HBLANK/P4.1” is P4. ...
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MYSON TECHNOLOGY COP10 = 1 Pin “P1.0” is CMOS Output Pin “P1.0” is 8051 standard I/O. OPTION (w) : Chip option configuration (All are "0" in Chip Reset). PWMF = 1 Selects 94KHz PWM frequency Selects ...
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MYSON TECHNOLOGY PORT5 (r/w) : Port 4 data input/output value. PORT6 (r/w) : Port 5 data input/output value. PORT4 (w) : Port 6 data output value. 5. PWM DAC Each output pulse width of PWM DAC converter is controlled by ...
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MYSON TECHNOLOGY Digital Filter VSYNC Digital Filter HSYNC 6.1 Composite SYNC separation/insertion The MTV312M continuously monitors the input HSYNC. If the vertical SYNC pulse can be extracted from the input, a CVpre flag is set and users can select the ...
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MYSON TECHNOLOGY 6.2.1 H-Freq Table H-Freq(KHZ) 1 31.5 2 37.5 3 43.3 4 46.9 5 53.7 6 60.0 7 68.7 8 75.0 9 80.0 10 85.9 11 93.8 12 106.3 6.2.2 V-Freq Table V-Freq(Hz ...
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MYSON TECHNOLOGY Display Region Positive cross-hatch Full white Revision 0.99 MTV312M64 Negative cross-hatch Full black - 12 - (Rev 0.99) 2001/07/26 ...
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MYSON TECHNOLOGY 63.5KHz, 60Hz Time Hor. Total time (A) 15.75us Hor. Active time (D) 12.05us Hor (E) 0.2us SYNC pulse width (B) 1.5us Hor (C) 2us Time Vert. Total time (O) 16.66ms Vert. Active time (R) ...
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MYSON TECHNOLOGY = 0 Off level of HSYNC input is low. V off Off level of VSYNC input is high Off level of VSYNC input is low. *H off and V off are valid when H ...
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MYSON TECHNOLOGY [(CLPW2:CLPW0 0.167 s for 12MHz X’ tal selection. INTFLG (w) : Interrupt flag. An interrupt event will set its individual flag, and, if the corresponding interrupt enable bit is set, the INT1 source of 8051 ...
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MYSON TECHNOLOGY the IIC Master by setting/clearing the EN128w/En256w bit. Besides, if the Only128 control bit is set, the SlaveA only accesses the lower 128 bytes of the DDCRAM. The MTV312M returns to DDC1 mode if HSCL is kept high ...
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MYSON TECHNOLOGY INTEN F04h (w) ETXBI MBUF F05h (r/w) DDCCTR F06h (w) DDC1en En128W En256W Only128 SLVAADR F07h (w) ENSlvA RCBBUF F08h (r) TXBBUF F08h (w) SLVBADR F09h (w) ENSlvB IICCTR (r/w) : IIC interface control register. MAckO = 1 ...
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MYSON TECHNOLOGY EReStaI = 1 Enables IIC bus repeat START interrupt. EWSlvAI = 1 Enables slave A IIC bus STOP of write mode interrupt. EMbufI = 1 Enables Master IIC bus interrupt. Mbuf (w) : Master IIC data shift register, ...
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MYSON TECHNOLOGY ADC conversion range is 5V/3.3V, S/W can select the current convert channel by setting the SADC1/SADC0 bit. The refresh rate for the ADC is OSC freq./1536. The ADC compares the input pin voltage with internal VDD*N/64 voltage (where ...
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MYSON TECHNOLOGY When ISP is enabled, the MTV312M disables Watchdog reset and switches the Flash interface to ISP host in 15-22.5uS. So S/W MUST enter idle mode immediately after enabling ISP. In the 8051 idle mode, PWM DACs and I/O ...
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MYSON TECHNOLOGY 10.4 ISP Data Read st nd The 1 and 2 bytes are the same as “Data Write” to define the low address of Flash. Between 2 bytes, the ISP host may issue Stop-Start or only Re-Start. From the ...
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MYSON TECHNOLOGY Memory Map of XFR Reg name addr bit7 IICCTR F00h (r/w) DDC2 IICSTUS F01h (r) WadrB INTFLG F03h (r) TXBI INTFLG F03h (w) INTEN F04h (w) ETXBI MBUF F05h (r/w) DDCCTR F06h (w) DDC1en En128W En256W Only128 SLVAADR ...
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MYSON TECHNOLOGY VCNTL F44h(r) VF7 HVCTR0 F40h(w) C1 HVCTR2 F42h(w) HVCTR3 F43h(w) INTFLG F48h(r/w) HPRchg VPRchg HPLchg VPLchg INTEN F49h(w) EHPR PADMOD F50h(w) DA13E PADMOD F51h(w) PADMOD F52h(w) HIICE PADMOD F53h(w) PADMOD F54h(w) P67oe PADMOD F55h(w) COP17 OPTION F56h(w) PWMF ...
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MYSON TECHNOLOGY ELECTRICAL PARAMETERS 1. Absolute Maximum Ratings at: Ta VSS=0V Name Maximum Supply Voltage Maximum Input Voltage (HSYNC, VSYNC & open-drain pins) Maximum Input Voltage (other pins) Maximum Output Voltage Maximum Operating Temperature Maximum ...
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MYSON TECHNOLOGY 4. AC Characteristics at: Ta VDD=5.0V/3.3V, VSS=0V Name Crystal Frequency PWM DAC Frequency HS input pulse Width VS input pulse Width HSYNC to Hblank output jitter H+V to Vblank output delay VS pulse width ...
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MYSON TECHNOLOGY PACKAGE DIMENSION 1. 40-pin PDIP 600 mil 52.197mm +/-0.127 1.981mm +/-0.254 1.270mm +/-0.254 0.457mm +/-0.127 3.81mm +/-0.127 3.302mm +/-0.254 2. 42 pin SDIP Unit: mm Revision 0.99 2.540mm 1.778mm +/-0.127 0.254mm (min.) Symbol - 26 - MTV312M64 (Rev ...
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MYSON TECHNOLOGY 3. 44 pin PLCC Unit: PIN #1 HOLE 0 0.045*45 0.050 TYP. 0.026~0.032 TYP. 0.653 +/-0.003 0.690 +/-0.005 Ordering Information Standard Configurations: Prefix Part Type MTV 312M Part Numbers: Part Type Prefix MTV 312M MTV 312M MTV 312M ...