AT32UC3A0256AU Atmel Corporation, AT32UC3A0256AU Datasheet - Page 369
AT32UC3A0256AU
Manufacturer Part Number
AT32UC3A0256AU
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(98 pages)
2.AT32UC3A0128.pdf
(826 pages)
3.AT32UC3A0128.pdf
(377 pages)
4.AT32UC3A0128.pdf
(33 pages)
5.AT32UC3A0128.pdf
(159 pages)
6.AT32UC3A0128AU.pdf
(2 pages)
Specifications of AT32UC3A0256AU
Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
109
Ext Interrupts
109
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
1
Uart
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
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- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
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- AT32UC3A0128AU PDF datasheet #6
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32058K AVR32-01/12
Figure 27-3.
27.6.3
27.6.3.1
27.6.3.2
Connection to External Devices
SMC
Byte Write or Byte Select Access
Data Bus Width
Memory Connections for 6 External Devices
NCS[0] - NCS[5]
D[31:0]
A[25:0]
NWE
NRD
If the physical memory device connected on one chip select is smaller than 64 Mbytes, it wraps
around and appears to be repeated within this space. The SMC correctly handles any valid
access to the memory device within the page (see
A[25:0] is only significant for 8-bit memory, A[25:1] is used for 16-bit memory, A[25:2] is used for
32-bit memory.
A data bus width of 8, 16 or 32 bits can be selected for each chip select. This option is controlled
by the field DBW in MODE (Mode Register) for the corresponding chip select.
Figure 27-4
connect a 512K x 16-bit memory on NCS2.
as a single 32-bit memory.
Each chip select with a 16-bit or 32-bit data bus can operate with one of two different types of
write access: byte write or byte select access. This is controlled by the BAT field of the MODE
register for the corresponding chip select.
shows how to connect a 512K x 8-bit memory on NCS2.
8 or 16 or 32
NCS0
Figure 27-6
NCS1
NCS2
Figure
A[25:0]
Memory Enable
Output Enable
Write Enable
D[31:0] or D[15:0] or
D[7:0]
NCS3
Memory Enable
NCS4
shows two 16-bit memories connected
27-3).
Memory Enable
NCS5
Memory Enable
Memory Enable
Memory Enable
Figure 27-5
AT32UC3A
shows how to
369
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