AT32UC3A1256AU Atmel Corporation, AT32UC3A1256AU Datasheet - Page 22
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
AT32UC3A1256AU
Manufacturer Part Number
AT32UC3A1256AU
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(98 pages)
2.AT32UC3A0128.pdf
(826 pages)
3.AT32UC3A0128.pdf
(377 pages)
4.AT32UC3A0128.pdf
(33 pages)
5.AT32UC3A0128.pdf
(159 pages)
6.AT32UC3A0128AU.pdf
(2 pages)
Specifications of AT32UC3A1256AU
Flash (kbytes)
256 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
69
Ext Interrupts
69
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
1
Uart
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
32058KS–AVR32–01/12
Table 9-2.
9.3
AT32UC3A0512
AT32UC3A1512
AT32UC3A0256
AT32UC3A1256
AT32UC3A1128
AT32UC3A0128
Part Number
Bus Matrix Connections
Flash Memory Parameters
Accesses to unused areas returns an error result to the master requesting such an access.
The bus matrix has the several masters and slaves. Each master has its own bus and its own
decoder, thus allowing a different memory mapping per master. The master number in the table
below can be used to index the HMATRIX control registers. For example, MCFG0 is associated
with the CPU Data master interface.
Table 9-3.
Each slave has its own arbiter, thus allowing a different arbitration per slave. The slave number
in the table below can be used to index the HMATRIX control registers. For example, SCFG3 is
associated with the Internal SRAM Slave Interface.
Table 9-4.
Master 0
Master 1
Master 2
Master 3
Master 4
Master 5
Slave 0
Slave 1
Slave 2
Slave 3
Slave 4
Slave 5
(FLASH_PW)
512 Kbytes
512 Kbytes
256 Kbytes
256 Kbytes
128 Kbytes
128 Kbytes
Flash Size
High Speed Bus masters
High Speed Bus slaves
CPU Data
CPU Instruction
CPU SAB
PDCA
MACB DMA
USBB DMA
Internal Flash
HSB-PB Bridge 0
HSB-PB Bridge 1
Internal SRAM
USBB DPRAM
EBI
Number of pages
(FLASH_P)
1024
1024
512
512
256
256
(FLASH_W)
128 words
128 words
128 words
128 words
128 words
128 words
Page size
General Purpose
AT32UC3A
(FLASH_F)
Fuse bits
32 fuses
32 fuses
32 fuses
32 fuses
32 fuses
32 fuses
22