AT32UC3B0512AU Atmel Corporation, AT32UC3B0512AU Datasheet - Page 364
AT32UC3B0512AU
Manufacturer Part Number
AT32UC3B0512AU
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A0128AU.pdf
(2 pages)
5.AT32UC3B0128.pdf
(684 pages)
6.AT32UC3B0128.pdf
(107 pages)
Specifications of AT32UC3B0512AU
Flash (kbytes)
512 Kbytes
Pin Count
64
Max. Operating Frequency
60 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
44
Ext Interrupts
44
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
4
Twi (i2c)
1
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
96
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3B0512AU-Z2U
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A0128AU PDF datasheet #4
- AT32UC3B0128 PDF datasheet #5
- AT32UC3B0128 PDF datasheet #6
- Current page: 364 of 684
- Download datasheet (11Mb)
32059L–AVR32–01/2012
U(P/E)RST.(E)PENn = 1
U(P/E)CFGn.ALLOC = 1
Pipes/Endpoints 0..5
Free Memory
Activated
memory area in the DPRAM and inserts it between the n-1 and n+1 pipes/endpoints. The n+1
pipe/endpoint memory window slides up and its data is lost. Note that the following pipe/end-
point memory windows (from n+2) do not slide.
Disabling a pipe, by writing a zero to the Pipe n Enable bit in the Pipe Enable/Reset register
(UPRST.PENn), or disabling an endpoint, by writing a zero to the Endpoint n Enable bit in the
Endpoint Enable/Reset register (UERST.EPENn), resets neither the UECFGn.ALLOC bit nor its
configuration (the Pipe Banks (PBK) field, the Pipe Size (PSIZE) field, the Pipe Token (PTO-
KEN) field, the Pipe Type (PTYPE) field, the Pipe Endpoint Number (PEPNUM) field, and the
Pipe Interrupt Request Frequency (INTFRQ) field in the Pipe n Configuration (UPCFGn) regis-
ter/the Endpoint Banks (EPBK) field, the Endpoint Size (EPSIZE) field, the Endpoint Direction
(EPDIR) field, and the Endpoint Type (EPTYPE) field in UECFGn).
To free its memory, the user shall write a zero to the UECFGn.ALLOC bit. The n+1 pipe/end-
point memory window then slides down and its data is lost. Note that the following pipe/endpoint
memory windows (from n+2) does not slide.
Figure 22-8 on page 364
example.
Figure 22-8. Allocation and Reorganization of the DPRAM
Note that:
PEP5
PEP4
PEP3
PEP2
PEP1
PEP0
1. The pipes/endpoints 0 to 5 are enabled, configured and allocated in ascending order.
2. The pipe/endpoint 3 is disabled, but its memory is kept allocated by the controller.
3. In order to free its memory, its ALLOC bit is written to zero. The pipe/endpoint 4 mem-
4. If the user chooses to reconfigure the pipe/endpoint 3 with a larger size, the controller
Each pipe/endpoint then owns a memory area in the DPRAM.
ory window slides down, but the pipe/endpoint 5 does not move.
allocates a memory area after the pipe/endpoint 2 memory area and automatically
slides up the pipe/endpoint 4 memory window. The pipe/endpoint 5 does not move and
a memory conflict appears as the memory windows of the pipes/endpoints 4 and 5
overlap. The data of these pipes/endpoints is potentially lost.
U(P/E)RST.(E)PEN3 = 0
Pipe/Endpoint 3
(ALLOC stays at 1)
Free Memory
Disabled
PEP5
PEP4
PEP3
PEP2
PEP1
PEP0
illustrates the allocation and reorganization of the DPRAM in a typical
U(P/E)CFG3.ALLOC = 0
Pipe/Endpoint 3
PEP4 Lost Memory
Memory Freed
Free Memory
PEP5
PEP4
PEP2
PEP1
PEP0
U(P/E)RST.(E)PEN3 = 1
U(P/E)CFG3.ALLOC = 1
Pipe/Endpoint 3
PEP3 (larger size)
Free Memory
Activated
PEP4
PEP2
PEP1
PEP0
PEP5
Conflict
364
Related parts for AT32UC3B0512AU
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
INTERVAL AND WIPE/WASH WIPER CONTROL IC WITH DELAY
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Low-Voltage Voice-Switched IC for Hands-Free Operation
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
MONOLITHIC INTEGRATED FEATUREPHONE CIRCUIT
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
AM-FM Receiver IC U4255BM-M
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Monolithic Integrated Feature Phone Circuit
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Multistandard Video-IF and Quasi Parallel Sound Processing
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
High-performance EE PLD
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
8-bit Flash Microcontroller
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
2-Wire Serial EEPROM
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
U6046BREAR WINDOW HEATING TIMER / LONG-TERM TIMER
Manufacturer:
ATMEL Corporation
Datasheet: