AT32UC3C0256C Atmel Corporation, AT32UC3C0256C Datasheet - Page 1013
AT32UC3C0256C
Manufacturer Part Number
AT32UC3C0256C
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3C0128C.pdf
(1313 pages)
4.AT32UC3C0128C.pdf
(108 pages)
Specifications of AT32UC3C0256C
Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
123
Ext Interrupts
144
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
7
Twi (i2c)
3
Uart
5
Can
2
Lin
5
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
68
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
22
Input Capture Channels
12
Pwm Channels
20
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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33.7.16
Name:
Access Type:
Offset:
Reset Value:
• CMPUx: Comparison x Update
• CMPMx: Comparison x Match
• UNRE: Synchronous Channels Update Underrun Error
• WRDY: Write Ready for Synchronous Channels Update
Note:
32117C–AVR-08/11
CMPM7
CMPU7
31
23
15
7
-
-
0: The comparison x has not been updated since the last read of the ISR2 register.
1: The comparison x has been updated at least one time since the last read of the ISR2 register.
0: The comparison x has not matched since the last read of the ISR2 register.
1: The comparison x has matched at least one time since the last read of the ISR2 register.
0: No Synchronous Channels Update Underrun has occurred since the last read of the ISR2 register.
1: At least one Synchronous Channels Update Underrun has occurred since the last read of the ISR2 register.
0: New duty-cycle and dead-time values for the synchronous channels cannot be written.
1: New duty-cycle and dead-time values for the synchronous channels can be written.
Reading ISR2 automatically clears WRDY, UNRE and CMPSx.
Interrupt Status Register 2
CMPM6
CMPU6
30
22
14
6
-
-
ISR2
Read-only
0x040
0x00000000
CMPM5
CMPU5
29
21
13
5
-
-
CMPM4
CMPU4
28
20
12
4
-
-
CMPM3
CMPU3
UNRE
27
19
11
3
-
CMPM2
CMPU2
26
18
10
2
-
-
CMPM1
CMPU1
25
17
9
1
-
-
AT32UC3C
CMPM0
CMPU0
WRDY
24
16
8
0
-
1013
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