AT32UC3C0256C Atmel Corporation, AT32UC3C0256C Datasheet - Page 892
AT32UC3C0256C
Manufacturer Part Number
AT32UC3C0256C
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3C0128C.pdf
(1313 pages)
4.AT32UC3C0128C.pdf
(108 pages)
Specifications of AT32UC3C0256C
Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
123
Ext Interrupts
144
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
7
Twi (i2c)
3
Uart
5
Can
2
Lin
5
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
68
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
22
Input Capture Channels
12
Pwm Channels
20
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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32.6.3
32.6.3.1
32.6.3.2
32.6.3.3
32117C–AVR-08/11
USB Host Operation
Device detection
Description of pipes
Host Enabling
Figure 32-16 on page 892
Figure 32-16. Host mode states
After a hardware reset, the USBC host mode is in the Reset state (see
When the USBC is enabled (USBCON.USBE = 1) in host mode (USBSTA.ID = 0) it enters Idle
state and waits for a device connection. Once a device is connected, the USBC enters the
Ready state, which does not require the USB clock to be activated.
In host mode the USBC will suspend the USB bus by not transmitting any Start Of Frame (SOF)
packets (the Start of Frame Generation Enable bit in the Host Global Interrupt register
UHCON.SOFE is zero). The USBC enters the Suspend state when the USB bus is suspended,
and exits when SOF generation is resumed.
A device is detected by the USBC in host mode when DP or DM are not tied low, i.e., when a
device DP or DM pull-up resistor is connected. To enable this detection, the host controller has
to supply the device with VBUS power, which is done when USBSTA.VBUSRQ is one.
The device disconnection is detected by the host controller when both DP and DM are pulled
down.
In host mode, the term “pipe” is used instead of “endpoint”. A host pipe corresponds to a device
endpoint, as illustrated by
Figure 32-17 on page 893
describes the USBC host mode main states.
Clock stopped
Ready
Macro off
Device
Connection
SOFE = 1
Device
Disconnection
SOFE = 0
Idle
Suspend
Device
Disconnection
from the USB specification.
<any
other
state>
Section
AT32UC3C
32.6.1.1).
892
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