AT32UC3C0256C Atmel Corporation, AT32UC3C0256C Datasheet - Page 106
AT32UC3C0256C
Manufacturer Part Number
AT32UC3C0256C
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3C0128C.pdf
(1313 pages)
4.AT32UC3C0128C.pdf
(108 pages)
Specifications of AT32UC3C0256C
Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
123
Ext Interrupts
144
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
7
Twi (i2c)
3
Uart
5
Can
2
Lin
5
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
68
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
22
Input Capture Channels
12
Pwm Channels
20
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
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Price
- AT32UC3A0128 PDF datasheet
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- AT32UC3C0128C PDF datasheet #3
- AT32UC3C0128C PDF datasheet #4
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9.3
9.3.1
9.3.2
Table 9-2.
106
Mnemonics
abs
acr
adc
add
add{cond4}
addabs
cp.b
cp.h
cp.w
cpc
max
min
neg
rsub
rsub{cond4}
sbc
scr
Instruction Set Summary
AVR32
Architecture revision
Arithmetic Operations
Arithmetic Operations
C
C
E
C
E
E
E
E
E
C
C
E
C
E
E
E
C
C
E
E
E
C
Operands / Syntax
Rd
Rd
Rd, Rx, Ry
Rd, Rs
Rd, Rx, Ry << sa
Rd, Rx, Ry
Rd, Rx, Ry
Rd, Rs
Rd, Rs
Rd, Rs
Rd, imm
Rd, imm
Rd
Rd, Rs
Rd, Rx, Ry
Rd, Rx, Ry
Rd
Rd, Rs
Rd, Rs, imm
Rd, imm
Rd, Rx, Ry
Rd
Unless otherwise noted, all instructions are part of revision 1 of the AVR32 architecture. The fol-
lowing instructions were added in revision 2, none were removed:
• movh Rd, imm
• {add, sub, and, or, eor}{cond4}, Rd, Rx, Ry
• ld.{sb, ub, sh, uh, w}{cond4} Rd, Rp[disp]
• st.{b, h, w}{cond4} Rp[disp], Rs
• rsub{cond4} Rd, imm
Description
Absolute value.
Add carry to register.
Add with carry.
Add.
Add shifted.
Add if condition satisfied.
Add with absolute value.
Compare Byte
Compare Halfword
Compare.
Compare with carry.
Return signed maximum
Return signed minimum
Two’s Complement.
Reverse subtract.
Reverse subtract immediate if condition
satisfied.
Subtract with carry.
Subtract carry from register.
Operation
Rd ← |Rd|
Rd ← Rd + C
Rd ← Rx + Ry + C
Rd ← Rd + Rs
Rd ← Rx + (Ry<<sa2)
if (cond4) Rd ← Rx + Ry
Rd ← Rx + |Ry|
Rd - Rs
Rd - Rs
Rd - Rs
Rd - SE(imm6)
Rd - SE(imm21)
Rd - C
Rd - Rs - C
Rd ← max(Rx, Ry)
Rd ← 0 - Rd
Rd ← Rs - Rd
Rd ← SE(imm8) - Rs
if (cond4) Rd ← SE(imm8) - Rd
Rd ← Rd - C
Rd ← min(Rx, Ry)
Rd ← Rx - Ry - C
32000D–04/2011
Rev
1
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
2
1
1
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