AT32UC3C0256C Atmel Corporation, AT32UC3C0256C Datasheet - Page 349

• Manufacturer Part Number: AT32UC3C0256C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C0256C

• Flash (kbytes): 256 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 123
• Ext Interrupts: 144
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 7
• Twi (i2c): 3
• Uart: 5
• Can: 2
• Lin: 5
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 22
• Input Capture Channels: 12
• Pwm Channels: 20
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32000D–04/2011
STCOND – Store Word Conditionally
Architecture revision:
Architecture revision1 and higher.
Description
The source register is stored to the word memory location referred to by the pointer address if
SREG[L] is set. Also, SREG[L] is copied to SREG[Z] to indicate a success or failure of the oper-
ation. This instruction is used for atomical memory access.
Operation:
I.
Syntax:
I.
Operands:
I.
Status Flags:
Opcode:
Note:
31
15
1
SREG[Z] ← SREG[L];
If SREG[L]
stcond Rp[disp], Rs
{s , p} ∈ {0, 1, …, 15}
disp ∈ {-32768, -32767, ..., 32767}
Q:
V:
N:
Z:
C:
1
29
1
*(Rp + SE(disp16)) ← Rs;
Not affected.
Not affected.
Not affected.
SREG[Z] ← SREG[L].
Not affected.
28
Rp
25
24
1
disp16
0
1
1
20
1
19
Rs
AVR32
0
16
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