AT32UC3C0512CAU Atmel Corporation, AT32UC3C0512CAU Datasheet - Page 5
AT32UC3C0512CAU
Manufacturer Part Number
AT32UC3C0512CAU
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3A0128AU.pdf
(2 pages)
4.AT32UC3C0128C.pdf
(1313 pages)
5.AT32UC3C0128C.pdf
(108 pages)
Specifications of AT32UC3C0512CAU
Flash (kbytes)
512 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
123
Ext Interrupts
144
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
7
Twi (i2c)
3
Uart
5
Can
2
Lin
5
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
68
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
22
Input Capture Channels
12
Pwm Channels
20
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
2. Overview
2.1
32117CS–AVR-08/11
Block diagram
Figure 2-1.
PA
PB
PC
PD
RESET_N
VBUS
RXLINE[0]
TXLINE[0]
RXLINE[1]
TXCAN[1]
XOUT[1:0]
VBOF
128/64
XIN[1:0]
TDO
TCK
TMS
Flash
D+
XOUT32
TDI
D-
512/
256/
ID
DSR, DTR, DCD, RI
XIN32
KB
Block diagram
ADCVREFP/N
ADCIN[15..0]
MISO, MOSI
ADCREF0/1
NPCS[3..0]
RTS, CTS
RTS, CTS
CLK[2..0]
TWCK
A[2..0]
B[2..0]
CLK
TXD
RXD
TXD
RXD
TWD
CLK
SCK
MSEO[1..0]
INTERFACE
MDO[5..0]
INTERFACE
EXTINT[8:1]
EVTO_N
EVTI_N
GCLK[1..0]
MCKO
Controller
BODs (1.8V,
PLL0 / PLL1
OSC0 / OSC1
NMI
JTAG
32 KHz OSC
3.3V, 5V)
Flash
CANIF
RC120M
aWire
USB
RCSYS
RAM
RC8M
4 KB
HSB
CONTROLLER
supplied by VDDANA
CLOCK
BRIDGE C
HSB-PB
CONVERTER 0/1
TIMER/COUNTER 0
POWER MANAGER
INTERFACE 2
INTERFACE 0
PERIPHERAL
ANALOG TO
TWO-WIRE
PB
USART1
USART4
DIGITAL
SERIAL
M
M
S
S
HSB
S
CLASS 2+
NEXUS
SYSTEM CONTROL
OCD
External Interrupt
CONTROLLER
CONTROLLER
PBB
M
CONTROLLER
WATCHDOG
PERIPHERAL
INTERFACE
Controller
SLEEP
RESET
TIMER
DMA
INTERFACE
M
INSTR
MEMORY PROTECTION UNIT
CONFIGURATION
M
AVR32UC CPU
HIGH SPEED
BUS MATRIX
BRIDGE A
HSB-PB
INTERFACE
HSB
PB
S
DATA
REGISTERS
M
FREQUENCY METER
TIMER/COUNTER 1
ASYNCHRONOUS
COMPARATOR
PERIPHERAL EVENT
QUADRATURE
CONVERTER 0/1
S
BUS
I2S INTERFACE
INTERFACE 0/1
PULSE WIDTH
MODULATION
CONTROLLER
0A/0B/1A/1B
INTERFACE 1
PERIPHERAL
supplied by VDDANA
DECODER
DIGITAL TO
TWO-WIRE
ANALOG
CONTROLLER
TIMER
USART0
USART2
USART3
ANALOG
SERIAL
BRIDGE B
0/1
LOCAL BUS
INTERFACE
KB SRAM
HSB-PB
64/32/16
HSB
S
M
M
M
S
PB
W
R
ETHERNET
Memory
DMA
AC0AOUT/AC0BOUT
AC1AOUT/AC1BOUT
MAC
DMA
AC0AP/N AC0BP/N
AC1AP/N AC1BP/N
EXT_FAULTS[1:0]
MISO, MOSI
PWMH[3..0]
NPCS[3..0]
PWML[3..0]
RTS, CTS
DAC0A/B
DAC1A/B
DACREF
CLK[2..0]
TWALM
PAD_EVT
MCLK
TWCK
B[2..0]
BCLK
ISDO
A[2..0]
QEPA
QEPB
TWD
QEPI
RXD
TXD
CLK
SCK
IWS
ISDI
AT32UC3C
DATA[15..0]
ADDR[23..0]
NCS[3..0]
SDCKE
NWAIT
SDA10
SDWE
NWE0
NWE1
SDCK
NRD
RAS
CAS
RXD[3..0],
TXD[3..0],
RX_CLK,
TX_CLK
RX_DV,
RX_ER,
TX_EN,
TX_ER,
SPEED
CRS,
MDC,
MDIO
COL,
PA
PB
PC
PD
5